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PCA9306DC1/DG Datasheet(PDF) 12 Page - NXP Semiconductors |
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PCA9306DC1/DG Datasheet(HTML) 12 Page - NXP Semiconductors |
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12 / 38 page ![]() NXP Semiconductors PCA9306 Dual bidirectional I2C-bus and SMBus voltage-level translator B-side A-side 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 5.0 V 1.8 V Rpu(A) = 294 Ω Rpu(B) = 294 Ω Rpu(A) = none Rpu(B) = 232 Ω Rpu(A) = none Rpu(B) = 357 Ω 2.5 V Rpu(A) = 392 Ω Rpu(B) = 392 Ω Rpu(A) = none Rpu(B) = 357 Ω 3.3 V Rpu(A) = none Rpu(B) = 348 Ω Table 13. Pull-up resistor minimum values, 15 mA driver sink current for PCA9306 and NVT20xx...continued 11.3 How to design for maximum frequency operation The maximum frequency is limited by the minimum pulse width LOW and HIGH as well as rise time and fall time. See Equation 1 as an example of the maximum frequency. The rise and fall times are shown in Figure 11. (1) 002aag912 tr(actual) tf(actual) GND VOL VIL VIH VCC tHIGH(min) tLOW(min) 1 / fmax 0.9 × VCC 0.1 × VCC Figure 11. An example waveform for maximum frequency The rise and fall times are dependent upon translation voltages, the drive strength, the total node capacitance (CL(tot)) and the pull-up resistors (RPU) that are present on the bus. The node capacitance is the addition of the PCB trace capacitance and the device capacitance that exists on the bus. Because of the dependency of the external components, PCB layout and the different device operating states the calculation of rise and fall times is complex and has several inflection points along the curve. The main component of the rise and fall times is the RC time constant of the bus line when the device is in its two primary operating states: when device is in the ON state and it is low-impedance, the other is when the device is OFF isolating the A-side from the B- side. A description of the fall time applied to either An or Bn output going from HIGH to LOW is as follows. Whichever side is asserted first, the B-side down must discharge to the VCC(A) voltage. The time is determined by the pull-up resistor, pull-down driver strength and the capacitance. As the level moves below the VCC(A) voltage, the channel resistance drops so that both A and B sides equal. The capacitance on both sides is connected to form the total capacitance and the pull-up resistors on both sides combine to the parallel equivalent resistance. The Ron of the device is small compared to the pull-up resistor values, so its effect on the pull-up resistance can be neglected and the fall is determined by the driver pulling the combined capacitance and pull-up resistor currents. An estimation of the actual fall time seen by the device is equal to the time it takes for the B-side to fall to the VCC(A) voltage and the time it takes for both sides to fall from the VCC(A) voltage to the VIL level. PCA9306 All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved. Product data sheet Rev. 9.3 — 14 November 2022 12 / 38 |
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