S12ECT16B8CV2 datasheet(65/152 Pages) NXP

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MC9S12XDP512 Device User Guide — 9S12XDP512DGV1/D V01.12

Section 2 Signal Description

This section describes signals that connect off-chip. It includes a pinout diagram, a table of signal

properties, and detailed discussion of signals. It is built from the signal description sections of the Block

User Guides of the individual IP blocks on the device.

2.1 Device Pinout

The MC9S12XDP512 is available in a 144-pin Low Profile Flat Quad Package (LQFP),112-pin Low

Profile Flat Quad Package (LQFP) and in a 80-pin Quad Flat Package (QFP). The XD-Family of devices

offers pin-compatible packaged devices to assist with system development and accommodate expansion

of the application.

The MC9S12XDP512 device is offered in the following options:

•

144-pin LQFP package with an external bus interface (address/data bus)

•

112-pin LQFP without external bus interface

•

80-pin QFP without external bus interface

Most pins perform two or more functions, as described in more detail in Section 2.2 Signal Properties

Summary. Figure 2-1, Figure 2-2 and Figure 2-3 show the pin assignments for the various packages.

Figure 2-1 MC9S12XD-Family Pin Assignment 144 LQFP Package

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

S12ECT16B8CV2 Datasheet(PDF) 65 Page - NXP Semiconductors