S12ECT16B8CV2 datasheet(74/152 Pages) NXP

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MC9S12XDP512 Device User Guide — 9S12XDP512DGV1/D V01.12

2.3.11 PB0 / ADDR0 / UDS / IVD[0] — Port B I/O Pin

PB0 is a general purpose input or output pin. In MCU expanded modes of operation, this pin is used for

the external address bus ADDR0 or as upper data strobe signal. In MCU emulation modes of operation,

this pin is used for external address bus ADDR0 and internal visibility read data IVD0.

2.3.12 PC[7:0] / DATA [15:8] — Port C I/O Pins

PC7-PC0 are general purpose input or output pins. In MCU expanded modes of operation, these pins are

used for the external data bus.

The input voltage thresholds for PC[7:0] can be configured to reduced levels, to allow data from an

external 3.3V peripheral to be read by the MCU operating at 5.0V. The input voltage thresholds for

PC[7:0] are configured to reduced levels out of reset in expanded and emulation modes.

2.3.13 PD[7:0] / DATA [7:0] — Port D I/O Pins

PD7-PD0 are general purpose input or output pins. In MCU expanded modes of operation, these pins are

used for the external data bus.

The input voltage thresholds for PD[7:0] can be configured to reduced levels, to allow data from an

external 3.3V peripheral to be read by the MCU operating at 5.0V. The input voltage thresholds for

PD[7:0] are configured to reduced levels out of reset in expanded and emulation modes.

2.3.14 PE7 / ECLKX2 / XCLKS — Port E I/O Pin 7

PE7 is a general purpose input or output pin. The XCLKS is an input signal which controls whether a

crystal in combination with the internal loop controlled (low power) Pierce oscillator is used or whether

full swing Pierce oscillator/external clock circuitry is used.

The XCLKS pin selects the oscillator configuration during RESET low phase while a clock quality check

is ongoing. This is the case for:

•

Power on Reset or Low Voltage Reset

•

Clock Monitor Reset

•

Any Reset while in Self Clock Mode or Full Stop Mode

The selected oscillator configuration is frozen with the rising edge of RESET.

The pin can be configured to drive the internal system clock ECLKX2.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

S12ECT16B8CV2 Datasheet(PDF) 74 Page - NXP Semiconductors