S12ECT16B8CV2 datasheet(76/152 Pages) NXP

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MC9S12XDP512 Device User Guide — 9S12XDP512DGV1/D V01.12

2.3.15 PE6 / MODB / TAGHI — Port E I/O Pin 6

PE6 is a general purpose input or output pin. It is used as a MCU operating mode select pin during reset.

The state of this pin is latched to the MODB bit at the rising edge of RESET. This pin is an input with a

pull-down device which is only active when RESET is low. TAGHI is used to tag the high half of the

instruction word being read into the instruction queue.

The input voltage threshold for PE6 can be configured to reduced levels, to allow data from an external

3.3V peripheral to be read by the MCU operating at 5.0V. The input voltage threshold for PE6 is

configured to reduced levels out of reset in expanded and emulation modes.

2.3.16 PE5 / MODA / TAGLO / RE — Port E I/O Pin 5

PE5 is a general purpose input or output pin. It is used as a MCU operating mode select pin during reset.

The state of this pin is latched to the MODA bit at the rising edge of RESET. This pin is shared with the

Read Enable RE output. This pin is an input with a pull-down device which is only active when RESET

is low. TAGLO is used to tag the low half of the instruction word being read into the instruction queue.

The input voltage threshold for PE5 can be configured to reduced levels, to allow data from an external

3.3V peripheral to be read by the MCU operating at 5.0V. The input voltage threshold for PE5 is

configured to reduced levels out of reset in expanded and emulation modes.

2.3.17 PE4 / ECLK — Port E I/O Pin 4

PE4 is a general purpose input or output pin. It can be configured to drive the internal bus clock ECLK.

ECLK can be used as a timing reference.

2.3.18 PE3 / LSTRB / LDS / EROMCTL— Port E I/O Pin 3

PE3 is a general purpose input or output pin. In MCU expanded modes of operation, LSTRB or LDS can

be used for the low byte strobe function to indicate the type of bus access. At the rising edge of RESET

the state of this pin is latched to the EROMON bit.

2.3.19 PE2 / R/W / WE— Port E I/O Pin 2

PE2 is a general purpose input or output pin. In MCU expanded modes of operations, this pin drives the

read/write output signal or write enable output signal for the external bus. It indicates the direction of data

on the external bus.

2.3.20 PE1 / IRQ — Port E Input Pin 1

PE1 is a general purpose input pin and the maskable interrupt request input that provides a means of

applying asynchronous interrupt requests. This will wake up the MCU from STOP or WAIT mode.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

S12ECT16B8CV2 Datasheet(PDF) 76 Page - NXP Semiconductors