DSP56300FMSLASHAD datasheet(21/120 Pages) NXP

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1-15

Host Interface (HI32)

HSERR

HIRQ

Output, open

drain

Output, open

drain

Tri-stated

Host System Error

When the HI32 is programmed to interface with a PCI bus and

the HI function is selected, this is the Host System Error signal.

Host Interrupt Request

When HI32 is programmed to interface with a universal, non-PCI

bus and the HI function is selected, this is the Host Interrupt

Request signal.

Port B

When the HI32 is configured as GPIO through the DCTR, this

signal is internally disconnected.

This input is 5 V tolerant.

HSTOP

HWR/HRW

Input/

Output

Input

Tri-stated

Host Stop

When the HI32 is programmed to interface with a PCI bus and

the HI function is selected, this is the Host Stop signal.

Host Write/Host Read-Write

When HI32 is programmed to interface with a universal, non-PCI

bus and the HI function is selected, this is the Host Write/Host

Read-Write Schmitt-trigger signal.

Port B

When the HI32 is configured as GPIO through the DCTR, this

signal is internally disconnected.

This input is 5 V tolerant.

HIDSEL

HRD/HDS

Input

Host Initialization Device Select

When the HI32 is programmed to interface with a PCI bus and

the HI function is selected, this is the Host Initialization Device

Select signal.

Host Read/Host Data Strobe

When HI32 is programmed to interface with a universal, non-PCI

bus and the HI function is selected, this is the Host Data

Read/Host Data Strobe Schmitt-trigger signal.

Port B

When the HI32 is configured as GPIO through the DCTR, this

signal is internally disconnected.

This input is 5 V tolerant.

Table 1-11. Host Interface (Continued)

Signal

Name

Type

State

During

Reset

Signal Description

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

DSP56300FM/AD Datasheet(PDF) 21 Page - NXP Semiconductors

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