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DSP56300FM/AD Datasheet(PDF) 74 Page - NXP Semiconductors |
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DSP56300FM/AD Datasheet(HTML) 74 Page - NXP Semiconductors |
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74 / 120 page  2-44 AC Electrical Characteristics 2.6.8 ESSI0/ESSI1 Timing Table 2-22. ESSI Timings No. Characteristics4, 5, 7 Symbol Expression 80 MHz 100 MHz Cond- ition6 Unit Min Max Min Max 430 Clock cycle 1 tSSICC 3 × T C 4 × T C 50.0 37.5 — — 30.0 40.0 — — x ck i ck ns 431 Clock high period For internal clock For external clock 2 × T C − 10.0 1.5 × T C 15.0 18.8 — — 10.0 15.0 — — ns ns 432 Clock low period For internal clock For external clock 2 × T C − 10.0 1.5 × T C 15.0 18.8 — — 10.0 15.0 — — ns ns 433 RXC rising edge to FSR out (bl) high — — 37.0 22.0 — — 37.0 22.0 x ck i ck a ns 434 RXC rising edge to FSR out (bl) low — — 37.0 22.0 — — 37.0 22.0 x ck i ck a ns 435 RXC rising edge to FSR out (wr) high 2 — — 39.0 24.0 — — 39.0 24.0 x ck i ck a ns 436 RXC rising edge to FSR out (wr) low2 — — 39.0 24.0 — — 39.0 24.0 x ck i ck a ns 437 RXC rising edge to FSR out (wl) high — — 36.0 21.0 — — 36.0 21.0 x ck i ck a ns 438 RXC rising edge to FSR out (wl) low — — 37.0 22.0 — — 37.0 22.0 x ck i ck a ns 439 Data in setup time before RXC (SCK in Synchronous mode) falling edge 10.0 19.0 — — 10.0 19.0 — — x ck i ck ns 440 Data in hold time after RXC falling edge 5.0 3.0 — — 5.0 3.0 — — x ck i ck ns 441 FSR input (bl, wr) high before RXC falling edge 2 1.0 23.0 — — 1.0 23.0 — — x ck i ck a ns 442 FSR input (wl) high before RXC falling edge 3.5 23.0 — — 3.5 23.0 — — x ck i ck a ns 443 FSR input hold time after RXC falling edge 3.0 0.0 — — 3.0 0.0 — — x ck i ck a ns 444 Flags input setup before RXC falling edge 5.5 19.0 — — 5.5 19.0 — — x ck i ck s ns 445 Flags input hold time after RXC falling edge 6.0 0.0 — — 6.0 0.0 — — x ck i ck s ns 446 TXC rising edge to FST out (bl) high — — 29.0 15.0 — — 29.0 15.0 x ck i ck ns 447 TXC rising edge to FST out (bl) low — — 31.0 17.0 — — 31.0 17.0 x ck i ck ns 448 TXC rising edge to FST out (wr) high2 — — 31.0 17.0 — — 31.0 17.0 x ck i ck ns 449 TXC rising edge to FST out (wr) low2 — — 33.0 19.0 — — 33.0 19.0 x ck i ck ns 450 TXC rising edge to FST out (wl) high — — 30.0 16.0 — — 30.0 16.0 x ck i ck ns Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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