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FS6408 Datasheet(PDF) 71 Page - NXP Semiconductors

Part # FS6408
Description  Power system basis chip with high speed can transceiver
PDF  111 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS6408 Datasheet(HTML) 71 Page - NXP Semiconductors

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NXP Semiconductors
71
FS6407/FS6408
7.3.7
HW config
Table 28. INIT INT. Description and configuration of the bits (default value in bold)
INT_duration
Description
Define the duration of the INTerrupt pulse
0
100 µs
1
25 µs
Reset condition
Power On Reset
INT_inh_all
Description
Inhibit ALL the INT
0
All INT sources
1
All INT INHIBITED
Reset condition
Power On Reset
INT_inh_Vsns
Description
Inhibit the INT for VSNS_UV
0
All INT sources
1VSNS_UV INT INHIBITED
Reset condition
Power On Reset
INT_inh_Vpre
Description
Inhibit the INT for VPRE status event (cf. register status Vreg1)
0
All INT sources
1VPRE status changed INHIBITED
Reset condition
Power On Reset
INT_inh_Vcore
Description
Inhibit the INT for VCORE status event (cf. register status Vreg2)
0
All INT sources
1VCORE status changed INHIBITED
Reset condition
Power On Reset
INT_inh_Vothers
Description
Inhibit the INT for VCCA / VAUX and VCAN status event (cf. register status Vreg2)
0
All INT sources
1VCCA / VAUX / VCAN status changed INHIBITED
Reset condition
Power On Reset
INT_inh_CAN
Description
Inhibit the INT for CAN error bits
0
All INT sources
1
CAN error bits changed INHIBITED
Reset condition
Power On Reset
Table 29. HW config. register description
Read
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
MOSI
00
0
1
0
000
00
00
00
00
MISO
SPI_G
WU
CAN_
G
Reserved IO_G
Vpre_
G
Vcore_
G
Vother
s_G
LS_det
ect
Vaux
not
used
Vcca_
PNP_d
etect
Vcca_
HW
Vaux_
HW
10
DBG



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