HCS12 datasheet(16/126 Pages) NXP

16 / 126 page

Device User Guide — 9S12KT256DGV1/D V01.09

Freescale Semiconductor

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Clock and Reset Generator (CRG)

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Phase-locked loop clock frequency multiplier

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Self Clock mode in absence of external clock

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COP watchdog

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Real Time interrupt (RTI)

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Memory

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32K, 64K, 128K or 256K Byte Flash EEPROM

i. Internal program/erase voltage generation

ii. Security and Block Protect bits

iii. Hamming Error Correction Coding (ECC)

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1K, 2K or 4K Byte EEPROM

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2K, 4K, 6K, 8K or 12K Byte static RAM

Single-cycle misaligned word accesses without wait states

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Analog-to-Digital Converter(s) (ADC)

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One 16-channel module with 10-bit resolution except for MC9S12KT256 and MC9S12KG256

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Two 8-channel module with 10-bit resolution for MC9S12KT256 and MC9S12KG256

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External conversion trigger capability

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8-channel Timer (TIM)

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Programmable input capture or output compare channels

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Simple PWM mode

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Counter Modulo Reset

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External Event Counting

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Gated Time Accumulation

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8-channel Pulse Width Modulator (PWM)

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Programmable period and duty cycle per channel

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8-bit 8-channel or 16-bit 4-channel

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Edge and center aligned PWM signals

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Emergency shutdown input

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Two or Three 1M bit per second, CAN 2.0 A, B software compatible modules

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Five receive and three transmit buffers

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Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit

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Four separate interrupt channels for Rx, Tx, error and wake-up

HCS12 Datasheet(PDF) 16 Page - NXP Semiconductors

HCS12 Datasheet(HTML) 16 Page - NXP Semiconductors

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