HCS12 datasheet(9/126 Pages) NXP

9 / 126 page

Device User Guide — 9S12KT256DGV1/D V01.09

Freescale Semiconductor

List of Figures

Figure 0-1

Order Part number Coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 1-1

MC9S12KG(L)(C)128(64)(32) Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 1-2

MC9S12KT(G)256 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 1-3

MC9S12KT256 and MC9S12KG256 Memory Map . . . . . . . . . . . . . . . . . . . . 23

Figure 1-4

MC9S12KG128, MC9S12KL128 and MC9S12KC128 Memory Map . . . . . . 24

Figure 1-5

MC9S12KG64, MC9S12KL64 and MC9S12KC64 Memory Map . . . . . . . . . 25

Figure 1-6

MC9S12KG32 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 2-1

Pin assignments for 112 LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Figure 2-2

Pin assignments for 100 LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Figure 2-3

Pin assignments for 80 QFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Figure 2-4

PLL Loop Filter Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

Figure 2-5

Loop Controlled Pierce Oscillator Connections (PE7=1) . . . . . . . . . . . . . . . . 62

Figure 2-6

Full Swing Pierce Oscillator Connections (PE7=0) . . . . . . . . . . . . . . . . . . . . 63

Figure 2-7

External Clock Connections (PE7=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

Figure 3-1

Clock Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Figure A-1

Voltage Regulator - Chip Power-up and Voltage Drops (not scaled) . . . . . 95

Figure A-2

ATD Accuracy Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

Figure A-3

Basic PLL functional diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

Figure A-4

Jitter Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

Figure A-5

SPI Master Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

Figure A-6

SPI Master Timing (CPHA =1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

Figure A-7

SPI Slave Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

Figure A-8

SPI Slave Timing (CPHA =1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

Figure A-9

General External Bus Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117

Figure B-1

80-pin QFP Mechanical Dimensions (case no. 841B) . . . . . . . . . . . . . . . . 122

Figure B-2

100-pin LQFP Mechanical Dimensions (case no. 983) . . . . . . . . . . . . . . . 123

Figure B-3

112-pin LQFP Mechanical Dimensions (case no. 987) . . . . . . . . . . . . . . . 124

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