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HCS12 Datasheet(PDF) 97 Page - NXP Semiconductors |
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HCS12 Datasheet(HTML) 97 Page - NXP Semiconductors |
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97 / 126 page ![]() Device User Guide — 9S12KT256DGV1/D V01.09 97 Freescale Semiconductor A.5 ATD Characteristics This section describes the characteristics of the analog to digital converter. A.5.1 ATD Operating Characteristics The Table A-11 shows conditions under which the ATD operates. The following constraints exist to obtain full-scale, full range results: VSSA ≤ VRL ≤ VIN ≤ VRH ≤ VDDA. This constraint exists since the sample buffer amplifier can not drive beyond the power supply levels that it ties to. If the input level goes outside of this range it will effectively be clipped. Table A-11 5V ATD Operating Characteristics Conditions are shown in Table A-4 unless otherwise noted Num C Rating Symbol Min Typ Max Unit 1 D Reference Potential Low High VRL VRH VSSA VDDA/2 VDDA/2 VDDA V V 2 C Differential Reference Voltage1 NOTES: 1. Full accuracy is not guaranteed when differential voltage is less than 4.75V VRH-VRL 4.75 5.0 5.25 V 3 D ATD Clock Frequency fATDCLK 0.5 2.0 MHz 4 D ATD 10-Bit Conversion Period Clock Cycles2 Conv, Time at 2.0MHz ATD Clock fATDCLK Conv, Time at 4.0MHz3 ATD Clock fATDCLK 2. The minimum time assumes a final sample period of 2 ATD clocks cycles while the maximum time assumes a final sample period of 16 ATD clocks. 3. Reduced accuracy see Table A-14 and Table A-15. NCONV10 TCONV10 TCONV10 14 7 3.5 28 14 7 Cycles µs µs 5 D ATD 8-Bit Conversion Period Clock Cycles(1) Conv, Time at 2.0MHz ATD Clock fATDCLK NCONV8 TCONV8 12 6 26 13 Cycles µs 6 D Stop Recovery Time (VDDA=5.0 Volts) tSR 20 µs 7 P Reference Supply current (two ATD modules) IREF 0.750 mA 8 P Reference Supply current (one ATD module) IREF 0.375 mA |
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