TW2866C datasheet(3/143 Pages) RENESAS

3 / 143 page

TW2866C

FN8253 Rev. 0.00

Page 3 of 143

February 3, 2012

Table of Contents

Pin Diagram...................................................................................... 5

Pin Descriptions .............................................................................. 6

Analog Video/Audio Interface Pins..................................................... 6

Digital Video/Audio Interface Pins....................................................... 7

System Control Pins .............................................................................. 8

Power and Ground Pins........................................................................ 9

Functional Description ................................................................. 10

Video Input Formats.............................................................................10

Analog Frontend...................................................................................11

Decimation Filter.................................................................................12

Automatic Gain Control and Clamping............................................13

Sync Processing...................................................................................13

Y/C Separation.......................................................................................13

Color Decoding .....................................................................................15

Chrominance Demodulation.............................................................15

ACC (Automatic Color gain control) .................................................16

Chrominance Processing...................................................................16

Chrominance Gain, Offset and Hue Adjustment ............................16

CTI (Color Transient Improvement)..................................................16

Luminance Processing .......................................................................16

Video Cropping .....................................................................................17

VDELAY + VACTIVE < Total number of lines per field......................... 17

Video Scaler...........................................................................................18

Output Format.......................................................................................21

ITU-R BT.656 Format........................................................................21

Two Channel ITU-R BT.656 Time-multiplexed Format with

54MHz....................................................................................22

Four Channel CIF Time-multiplexed Format with 54MHz .............23

Four Channel D1 Time-division-multiplexed Format with

108MHz .................................................................................25

Output Enabling Act...........................................................................27

Video Output Channel Selection ......................................................27

Extra Sync Output..............................................................................27

Video Encoder.......................................................................................30

Output Standard Selection................................................................30

Audio Codec..........................................................................................32

Audio Clock Master/Slave mode......................................................34

Audio Detection..................................................................................34

Multi-Chip Operation..........................................................................34

Serial Audio Interface.........................................................................37

Playback Input....................................................................................37

Record Output....................................................................................38

Mix Output...........................................................................................39

Audio Clock Slave Mode Data Output Timing ................................40

ACLKP/ASYNP Slave Mode Data Input Timing.............................42

Audio Clock Generation ....................................................................44

Audio Clock Auto Setup ....................................................................46

Host Interface................................................................................. 47

Serial Interface.......................................................................................47

Interrupt Interface..................................................................................48

Squared Pixel Mode Operation..........................................................48

Clock PLL ...............................................................................................49

Control Register....................................................................................50

0x00(CH1)/0x10(CH2)/0x20(CH3)/0x30(CH4)

– Video

Status Register......................................................................60

0x01(CH1)/0x11(CH2)/0x21(CH3)/0x31(CH4)

–

BRIGHTNESS Control Register .........................................60

0x02(CH1)/0x12(CH2)/0x22(CH3)/0x32(CH4)

–

CONTRAST Control Register .............................................60

0x03(CH1)/0x13(CH2)/0x23(CH3)/0x33(CH4)

–

SHARPNESS Control Register...........................................61

0x04(CH1)/0x14(CH2)/0x24(CH3)/0x34(CH4)

– Chroma (U)

Gain Register.........................................................................61

0x05(CH1)/0x15(CH2)/0x25(CH3)/0x35(CH4)

– Chroma (V)

Gain Register.........................................................................61

0x06(CH1)/0x16(CH2)/0x26(CH3)/0x36(Ch4)

– Hue Control

0x07(CH1)/0x17(CH2)/0x27(CH3)/0x37(CH4)

– Cropping

0x08(CH1)/0x18(CH2)/0x28(CH3)/0x38(CH4)

– Vertical

Delay Register, Low..............................................................62

0x09(CH1)/0x19(CH2)/0x29(CH3)/0x39(CH4)

– Vertical

Active Register, Low .............................................................62

0x0A(CH1)/0x1A(CH2)/0x2A(CH3)/0x3A(CH4)

– Horizontal

Delay Register, Low..............................................................62

0x0B(CH1)/0x1B(CH2)/0x2B(CH3)/0x3B(CH4)

– Horizontal

Active Register, Low .............................................................63

0x0C(CH1)/0x1C(CH2)/0x2C(CH3)/0x3C(CH4)

–

Macrovision Detection ..........................................................63

0x0D(CH1)/0x1D(CH2)/0x2D(CH3)/0x3D(CH4)

– Chip

STATUS II..............................................................................63

0x0E(CH1)/0x1E(CH2)/0x2E(CH3)/0x3E(CH4)

– Standard

Selection.................................................................................64

0x0F(CH1)/0x1F(CH2)/0x2F(CH3)/0x3F(CH4)

– Standard

Recognition............................................................................65

0xE4(CH1)/0xE7(CH2)/0xEA(CH3)/0xED(CH4)

– Vertical

Scaling Register, Low...........................................................65

0xE5(CH1)/0xE8(CH2)/0xEB(CH3)/0xEE(CH4)

– Scaling

0xE6(CH1)/0xE9(CH2)/0xEC(CH3)/0xEF(CH4)

– Horizontal

Scaling Register, Low...........................................................65

0xA4(CH1)/0xA5(CH2)/0xA6(CH3)/0xA7(CH4)

– ID

Detection Control...................................................................66

0xC4(CH1)/0xC5(CH2)/0xC6(CH3)/0xC7(CH4)

– H monitor.......66

0x80

– Software Reset Control Register..........................................66

0x81

– Analog Control Register........................................................67

0x82

– Analog Control Reister2........................................................67

0x83

– Control Register I...................................................................68

0x84

– Color Killer Hysteresis Control Register...............................68

0x85

– Vertical Sharpness ................................................................68

0x86

– Coring Control Register.........................................................69

0x87

– Clamping Gain.......................................................................69

0x88

– Individual AGC Gain..............................................................69

0x8A

– White Peak Threshold..........................................................69

0x8B

– Clamp level.............................................................................69

0x8C

– Sync Amplitude......................................................................70

0x8D

– Sync Miss Count Register....................................................70

0x8E

– Clamp Position Register.......................................................70

0x8F

– Vertical Control I.....................................................................70

0x90

– Vertical Control II....................................................................71

0x91

– Color Killer Level Control.......................................................71

0x92

– Comb Filter Control................................................................71

0x93

– Luma Delay and H Filter Control..........................................71

0x94

– Miscellaneous Control I.........................................................71

0x95

– LOOP Control Register.........................................................72

0x96

– Miscellaneous Control II........................................................72

0x97

– CLAMP MODE......................................................................73

0x98

– HSLOWCTL..........................................................................73

0x99

– HSBEGIN...............................................................................73

0x9A

– HSEND..................................................................................74

0x9B

– OVSDLY................................................................................74

0x9C

– OVSEND...............................................................................74

0x9D

– HBLEN...................................................................................74

0x9E

– NOVID....................................................................................75

0x41

– Video Encoder Standard Control.........................................76

0x42

– Video Encoder Test Generation...........................................76

0x43

– Video Encoder Clock and Delay control..............................77

0x44

– Video Encoder Output Control.............................................77

0x45

– Video Encoder SCH..............................................................77

0x46

– Video Encoder YGAIN..........................................................77

0x47

– Video Encoder CGAIN..........................................................78

0x48

– Video Encoder SGAIN..........................................................78

0x49

– Video Encoder BGAIN..........................................................78

0x4A

– Video DAC control ................................................................78

0x4B

– Video DAC control ................................................................79

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