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TW2866C Datasheet(PDF) 23 Page - Renesas Technology Corp |
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TW2866C Datasheet(HTML) 23 Page - Renesas Technology Corp |
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23 / 143 page  TW2866C FN8253 Rev. 0.00 Page 23 of 143 February 3, 2012 CLKPOn (27MHz) MAINCHn SELCHn VDn[7:0] FF Y50 00 Cr50 00 Y51 XY Cb52 Cb0 Y52 Y0 CLKNOn (27MHz) Y50 Cr50 Y51 Cb52 Y52 FF 00 00 XY Cb0 Y0 FIGURE 12. PIN OUTPUT TIMING OF TWO CHANNEL TIME-MULTIPLEXED FORMAT WITH 27MHZ CLOCK. FOUR CHANNEL CIF TIME-MULTIPLEXED FORMAT WITH 54MHZ Four channel CIF (360x480) time-multiplexed format is also provided for specific security application using the CIF_54M register. For this format, each channel ITU-R BT.656 data stream is down-sampled into 13.5MHz ITU-R BT.656 data stream except the sync code. Optionally, the vertical scaling can also be enabled to support Quad (360x240) format using the VSCL_ENA register. Then, these four 13.5MHz ITU-R BT.656 data stream are time-multiplexed into 54MHz data stream. This format requires only one channel video port to transfer whole four channel CIF data independently.When CIF_54M register is set to 1,TW2866 can support one channel video port to transfer whole four channel CIF data independently and the other video port to transfer two channel Full D1 ITU-R BT.656 time-multiplexed format simultaneously.To de-multiplex the time-multiplexed data in the back end chip, the channel ID can be inserted in the data stream using the CHID_MD register. Two kinds of channel ID format can be supported. One is horizontal blanking code with channel ID and the other is ITU-R BT.656 sync code with channel ID. Optionally, when the vertical scaling is enabled, the ITU-R BT.656 sync code will be skipped in the invalid line through the VSCL_SYNC register. Figure 13, Figure 14 and Table 4 illustrates the timing diagram and detailed channel ID format for four channel CIF time-multiplexed format with 54MHz. CLKP (54MHz) CH1 CH2 CH3 CH4 CIF54M Cb0 Y16 Y82 FF Y0 Cr16 Cb84 00 Cr0 Y18 Y84 00 Y2 Cb20 Cb84 XY Cb4 Y20 Y86 Cb0 Y4 Cr20 Cb88 Y0 Cr4 Y22 Y88 Cr0 FF 00 00 XY Cb0 Y0 Cr0 Y82 Cb84 Y84 Cr84 Y86 Cb88 Y88 Y16 Cr16 Y18 Cb20 Y20 Cr20 Y22 Cb0 Y0 Cr0 Y2 Cb4 Y4 Cr4 FIGURE 13. LOGICAL TIMING DIAGRAM OF 4 CH CIF TIME-MULTIPLEXED FORMAT |
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