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TW2866C Datasheet(PDF) 95 Page - Renesas Technology Corp |
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TW2866C Datasheet(HTML) 95 Page - Renesas Technology Corp |
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95 / 143 page ![]() TW2866C FN8253 Rev. 0.00 Page 95 of 143 February 3, 2012 0XCE – ANALOG POWER DOWN CONTROL Bit Function R/W Description Reset 7 AAUTOMUTE R/W 1: When input Analog data is less than ADET_TH level,output PCM data will be 0x0000(0x00).Audio DAC data input is 0x200. 0: No effect 0 6 Reserved R Reserved 0 5 A_DAC_PWDN R/W Power down the audio DAC. 0: Normal operation 1: Power down 0 4 A_ADC_PWDN R/W Power down the audio ADC. 0: Normal operation 1: Power down 0 3-0 V_ADC_PWDN R/W Power down the video ADC. V_ADC_PWDN[3:0] stands for CH4 to CH1. 0: Normal operation 1: Power down 0h 0XCF – SERIAL MODE CONTROL Bit Function R/W Description Reset 7-6 SMD R/W Set up cascade Audio Serial mode. When SMD=2hex or 3hex,ALINKO pin output cascaded audio serial data. When SMD=0hex, ALINKO pin output is tri-state. 00:No Serial mode. ALINKO pin is tri-state output. 10: ALINKO pin is Serial out pin. ALINKI pin is Serial input pin. 0h 5-4 VRSTEL R/W Select VRST(V reset) signal on ACKG (Audio Clock Generator) refin input . 0 Ch1 VRST 1 Ch2 VRST 2 Ch3 VRST 3 Ch4 VRST 0h 3-0 Reserved R 0 |
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