TW2866C datasheet(67/143 Pages) RENESAS

67 / 143 page

TW2866C

FN8253 Rev. 0.00

Page 67 of 143

February 3, 2012

0X81 – ANALOG CONTROL REGISTER

Bit

Function

R/W

Description

Reset

Reserved

IREF

R/W

0 = Internal current reference 1.

1 = Internal current reference increase 30%.

VREF

R/W

0 = Internal voltage reference.

1 = Internal voltage reference shut down.

Reserved

R/W

0 = Normal operation(must be 0),

1 = AIGAINTEST

CLKPDN

R/W

0 = Normal clock operation.

1 = All 4Ch Video Decoder System clock in power down mode,

but the MPU INTERFACE module and output clocks (CLKP and

CLKN) are still active.

Reserved

R/W

0 = Normal operation(must be 0),

1 = AINSWTEST

YFLEN

R/W

Analog Video CH1/CH2/CH3/CH4 anti-alias filter control

1 = enable

0 = disable

YSV

R/W

Analog Video CH1/CH2/CH3/CH4 Reduced power mode

1 = enable

0 = disable

0X82 – ANALOG CONTROL REISTER2

Bit

Function

R/W

Description

Reset

CTEST

R/W

Clamping control for debugging use.(Test purpose only)

YCLEN

R/W

1 = Y channel clamp disabled(Test purpose only)

0 = Enabled.

CKIPOL

R/W

27MHz clock output signal rise/fall timing.

0: change by 54MHz clock output falling edge.

1: change by 54MHz clock output rising edge.

Reserved

GTEST

R/W

1 = Test.(Test purpose only)

0 = Normal operation.

VLPF

R/W

Clamping filter control.

CKLY

R/W

Clamping current control 1.

CKLC

R/W

Clamping current control 2.

TW2866C Datasheet(PDF) 67 Page - Renesas Technology Corp

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