AD8337 datasheet(23/28 Pages) AD

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AD8337

Rev. A | Page 23 of 28

The offset voltage effect of the AD8337, as with all VGAs, can

appear as a complex waveform when observed across the range

of VGAIN voltage. Generated by multiple sources, each device has

a unique VOS profile while the GAIN input is swept through its

voltage range. The offset voltage profile seen in Figure 15 is a

typical example. If the VGAIN input voltage is modulated, the

output is the product of the VGAIN and the dc profile of the offset

voltage, and it can be observed on a scope as a small ac signal

as shown in Figure 74. In Figure 74, the signal applied to the

VGAIN input is a 1 kHz ramp, and the output voltage signal is

slightly less than 4 mV p-p.

–4

–800

–2

VGAIN (mV)

–600

–200

–400

400

600

200

800

–10

–8

–6

VS = 2.5

INPUT

OUTPUT

VS = ±2.5V

Figure 74. Offset Voltage vs. VGAIN for a 1 kHz Ramp

The profile of the waveform shown in Figure 74 is consistent

over a wide range of signals from dc to about 20 kHz. Above

20 kHz, secondary artifacts can be generated due to the effects

of minor internal circuit tolerances as seen in Figure 75. These

artifacts are caused by settling and time constants of the inter-

polator circuit and appear at the output as the voltage spikes

seen in Figure 75.

–4

–800

–2

VGAIN (mV)

–600

–200

–400

400

600

200

800

–10

–8

–6

VS = 2.5

INPUT

OUTPUT

SPIKE

VS = ±2.5V

Figure 75. VOS Profile for a 50 kHz Ramp

Under certain circumstances, the product of VGAIN and the

offset profile plus spikes is a coherent spurious signal within

the signal band of interest and indistinguishable from desired

signals. In general, the slower the ramp applied to the GAIN

pin, the smaller the spikes are. In most applications, these

effects are benign and not an issue.

THERMAL CONSIDERATIONS

The thermal performance of chip scale packages, such as

the AD8337, departs significantly from that of leaded devices

such as the larger TSSOP or QFSP. In larger packages, heat is

conducted away from the die by the path provided by the bond

wires and the device leads. In chip scale packages, the heat

transfer mechanisms are surface-to-air radiation from the top

and side surfaces of the package and conduction through the

metal solder pad on the mounting surface of the device.

θJC is the traditional thermal metric found in the data sheets

of integrated circuits. Heat transfer away from the die is a three-

dimensional dynamic, and the path is through the bond wires,

leads, and the six surfaces of the package. Because of the small

size of chip scale packages, the θJC is not measured conventionally.

Instead, it is calculated using thermodynamic rules.

The AD8837’s θJC value listed in Table 2 assumes that the tab

is soldered to the board and that there are three additional

ground layers beneath the device connected by at least four vias.

For a device with an unsoldered pad, the θJC nearly doubles,

becoming 138°C/W.

PSI (Ψ)

Table 2 lists a subset of the classic theta specification, ΨJT

(Psi junction to top). θJC is the metric of heat transfer from

the die to the case, involving the six outside surfaces of the

package. Ψ(XY) is a subset of the theta value and the thermal

gradient from the junction (die) to each of the six surfaces.

Ψ can be different for each of the surfaces, but since the top of

the package is actually a fraction of a millimeter from the die,

the surface temperature of the package is very close to the die

temperature. The die temperature is calculated as the product

of the power dissipation and ΨJT. Since the top surface tempera-

ture and power dissipation are easily measured, it follows that the

die temperature is easily calculated. For example, for a dissipation

of 180 mW and a ΨJT of 5.3°/W, the die temperature is slightly less

than 1°C higher than the surface temperature.

BOARD LAYOUT

Because the AD8337 is a high frequency device, board layout

is critical. It is very important to have a good ground plane

connection to the VCOM pin. Coupling through the ground

plane, from the output to the input, can cause peaking at higher

frequencies.

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