ADS5546 datasheet(35/50 Pages) TI

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Clock Input

S0166-01

CLKP

VCM

5kW

CLKM

VCM

ADS5546

CLKP

CLKM

DifferentialSine-Wave

orPECL orLVDS

ClockInput

ADS5546

0.1 F

ADS5546

SLWS183C – NOVEMBER 2005 – REVISED OCTOBER 2006

APPLICATION INFORMATION (continued)

ADS5546 clock inputs can be driven differentially (SINE, LVPECL or LVDS) or single-ended (LVCMOS), with

little or no difference in performance between configurations. The common-mode voltage of the clock inputs is

set to VCM using internal 5-k

Ω resistors as shown in Figure 48. This allows the use of transformer-coupled drive

circuits for sine wave clock, or ac-coupling for LVPECL, LVDS clock sources (Figure 49 and Figure 50)

Figure 48. Internal Clock Buffer

For best performance, it is recommended to drive the clock inputs differentially, reducing susceptibility to

common-mode noise. In this case, it is best to connect both clock inputs to the differential input clock signal with

0.1-

µF capacitors, as shown in Figure 49.

Figure 49. Differential Clock Driving Circuit

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ADS5546 Datasheet(PDF) 35 Page - Texas Instruments