ADS5546 datasheet(21/50 Pages) TI

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PIN CONFIGURATION (CMOS MODE)

DRGND

DRVDD

OVR

UNUSED

CLKOUT

DFS

AVDD

AGND

CLKP

CLKM

AGND

DRGND

DRVDD

RESET

SCLK

SDATA

SEN

AVDD

AGND

P0023-03

RGZPACKAGE

(TOP VIEW)

ADS5546

SLWS183C – NOVEMBER 2005 – REVISED OCTOBER 2006

Figure 8. CMOS Mode Pinout

PIN ASSIGNMENTS – CMOS Mode

NUMBER

PIN NAME

DESCRIPTION

TYPE

NUMBER

OF PINS

8, 18, 20,

AVDD

Analog power supply

22, 24, 26

9, 12, 14, 17,

AGND

Analog ground

19, 25

CLKP, CLKM Differential clock input

10, 11

INP, INM

Differential analog input

15, 16

Internal reference mode – Common-mode voltage output.

VCM

External reference mode – Reference input. The voltage forced on this pin sets

I/O

the internal references.

IREF

Current-set resistor, 56.2-k

Ω resistor to ground.

Serial interface RESET input.

When using the serial interface mode, the user MUST initialize internal registers

through hardware RESET by applying a high-going pulse on this pin, or by using

the software reset option. See the SERIAL INTERFACE section.

RESET

In parallel interface mode, the user has to tie RESET pin permanently HIGH.

(SDATA and SEN are used as parallel pin controls in this mode).

The pin has an internal 100-k

Ω pull-down resistor.

This pin functions as serial interface clock input when RESET is low.

It functions as LOW SPEED mode control pin when RESET is tied high. Tie SCLK

SCLK

to LOW for Fs > 50 MSPS and SCLK to HIGH for Fs

≤ 50 MSPS. See Table 3.

The pin has an internal 100-k

Ω pull-down resistor.

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