ADS5546 datasheet(27/50 Pages) TI

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0.34

0.64

0.94

1.24

1.54

1.84

2.14

2.44

2.74

Clock Amplitude-VPP

SNR

=150MHz

SineWaveInputClock

SFDR

InputClockDutyCycle − %

73.5

74.0

73.0

74.5

75.0

75.5

SFDR

=10MHz

SNR

VoltageForcedontheCMPin − V

1.4

1.45

1.5

1.55

1.6

SFDR

SNR

OutputCode

f-Frequencyof ACCommon-ModeVoltage-MHz

-70

-65

-60

-45

-40

-35

100

-55

-50

ADS5546

SLWS183C – NOVEMBER 2005 – REVISED OCTOBER 2006

TYPICAL CHARACTERISTICS (continued)

All plots are at 25

°C, AVDD = DRVDD = 3.3 V, sampling frequency = 190 MSPS, sine wave input clock, 1.5 V

PP differential

clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, 0 dB gain, DDR LVDS

data output (unless otherwise noted)

PERFORMANCE vs CLOCK AMPLITUDE

PERFORMANCE vs INPUT CLOCK DUTY CYCLE

Figure 33.

Figure 34.

OUTPUT NOISE HISTOGRAM WITH

INPUTS SHORTED TO COMMON-MODE

PERFORMANCE IN EXTERNAL REFERENCE MODE

Figure 35.

Figure 36.

COMMON-MODE REJECTION RATIO vs FREQUENCY

Figure 37.

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