ADS5546 datasheet(14/50 Pages) TI

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T0109-01

RegisterData

(SCLK)

(DSU)

(DH)

(SLOADS)

SDATA

SCLK

SEN

RESET

(SLOADH)

SERIAL INTERFACE TIMING CHARACTERISTICS

ADS5546

SLWS183C – NOVEMBER 2005 – REVISED OCTOBER 2006

After power-up, the internal registers must be reset to their default values. This is done in one of two ways:

1. Either through hardware reset by applying a high-going pulse on RESET pin (of width greater than 10 ns) as

shown in Figure 5.

2. By applying software reset. Using the serial interface, set the <RST> bit (D1 in register 0x6C) to high. This

initializes the internal registers to their default values and then self-resets the <RST> bit to low. In this case

the RESET pin is kept low.

Figure 5. Serial Interface Timing Diagram

Typical values at 25

°C, min and max values across the full temperature range T

MIN = –40°C to TMAX = 85°C,

AVDD = DRVDD = 3.3 V (unless otherwise noted)

MIN

TYP

MAX

UNIT

tSCLK

SCLK period

SCLK duty cycle

50%

tSLOADS

SEN to SCLK setup time

tSLOADH

SCLK to SEN hold time

tDSU

SDATA setup time

tDH

SDATA hold time

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