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MP2733 Datasheet(PDF) 42 Page - MPS Industries, Inc.

Part # MP2733
Description  Wide Input Range, 4.5A,I2C-Controlled SW Charger with NVDC Power Path and USB OTG and Enhanced ADC
PDF  51 Pages
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Manufacturer  MPSIND [MPS Industries, Inc.]
Direct Link  http://www.mpsind.com/index.html
Logo MPSIND - MPS Industries, Inc.

MP2733 Datasheet(HTML) 42 Page - MPS Industries, Inc.

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MP2733
– 4.5A SW CHARGER WITH I2C CONTROL, NVDC POWER PATH, USB OTG
MP2733 Rev. 1.1
www.MonolithicPower.com
42
5/18/2023
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2023 MPS. All Rights Reserved.
REG14h: Power Management Status
Bit
Name
POR
Reset by
REG_RST
Reset
by WTD
R/W
Description
Comment
7
VINPPM_STAT
0
N
N
R
0: No PPM
1: VINPPM
This bit is set to 0 by default.
6
IINPPM_STAT
0
N
N
R
0: No PPM
1: IINPPM
This bit is set to 0 by default.
5
IIN_DPM[5]
0
N
N
R
1600mA
These bits have a 100mA
offset, a 100mA to 3.25A
range, and are set to 001000
by default.
4
IIN_DPM[4]
0
N
N
R
800mA
3
IIN_DPM[3]
1
N
N
R
400mA
2
IIN_DPM[2]
0
N
N
R
200mA
1
IIN_DPM[1]
0
N
N
R
100mA
0
IIN_DPM[0]
0
N
N
R
50mA
REG15h: DPM Mask
Bit
Name
POR
Reset by
REG_RST
Reset
by WTD
R/W
Description
Comment
7
AICO_STAT
0
N
N
R
0: No operation
1: AICO action
This bit is set to 0 by default.
6
VINPPM_INT_
MASK[1]
1
Y
Y
R/W
0: No INT during
VINPPM
1: INT during VINPPM
This bit is set to 1 by default.
5
IINPPM_INT_
MASK[1]
1
Y
Y
R/W
0: No INT during
IINPPM
1: INT during IINPPM
This bit is set to 1 by default.
4
RESERVED
N/A
N/A
N/A
N/A
Reserved.
3
RESERVED
N/A
N/A
N/A
N/A
Reserved.
2
RESERVED
N/A
N/A
N/A
N/A
Reserved.
1
RESERVED
N/A
N/A
N/A
N/A
Reserved.
0
RESERVED
N/A
N/A
N/A
N/A
Reserved.



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