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MP2733 Datasheet(PDF) 11 Page - MPS Industries, Inc.

Part # MP2733
Description  Wide Input Range, 4.5A,I2C-Controlled SW Charger with NVDC Power Path and USB OTG and Enhanced ADC
PDF  51 Pages
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Manufacturer  MPSIND [MPS Industries, Inc.]
Direct Link  http://www.mpsind.com/index.html
Logo MPSIND - MPS Industries, Inc.

MP2733 Datasheet(HTML) 11 Page - MPS Industries, Inc.

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MP2733
– 4.5A SW CHARGER WITH I2C CONTROL, NVDC POWER PATH, USB OTG
MP2733 Rev. 1.1
www.MonolithicPower.com
11
5/18/2023
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2023 MPS. All Rights Reserved.
ELECTRICAL CHARACTERISTICS (continued)
VIN = 5V, TA = 25°C, unless otherwise noted.
Parameter
Symbol
Condition
Min
Typ
Max
Units
Charge current LSB
ICHG_RES
17.5
mA
Charge current accuracy
ICHG_ACC
Charge mode, ICHG = 1.84A
3
LSB
System voltage range
VSYS
0
5.1
V
System voltage LSB
VSYS_RES
20
mV
System voltage accuracy
VSYS_ACC
VSYS = 3.8V
2
LSB
Input current range
IIN
0
3.39
A
Input current LSB
IIN_RES
13.3
mA
Input current accuracy
IIN_ACC
IIN = 500mA
4
LSB
NTC voltage range
VNTC
0
100
%
NTC voltage LSB
VNTC_RES
0.392
%
NTC voltage accuracy
VNTC_ACC
VNTC = 50%
2
LSB
DP/DM USB Detection
DP DCD current source
IDP_SRC
7
10
14
uA
DM pull-down resistance
RDM_DOWN
14.3
20
24.8
kΩ
Data detection voltage
VDAT_REF
0.25
0.325
0.4
V
DP/DM comparator threshold
(2.9V)
VTH_2P9
2.8
2.9
3.0
V
DP/DM comparator threshold
(2.4V)
VTH_2P4
2.3
2.4
2.5
V
DP/DM comparator threshold
(2.2V)
VTH_2P2
2.1
2.2
2.3
V
DP/DM comparator threshold
(1.7V)
VTH_1V7
1.6
1.7
1.8
V
DP voltage source
VDP_SRC
0.5
0.6
0.7
V
DM voltage source
VDM_SRC
0.5
0.6
0.7
V
DP sink current
IDP_SINK
70
100
130
μA
DM sink current
IDM_SINK
70
100
130
μA
Leakage current input DP/DM
pin
IDP_LKG
-1
+1
μA
IDM_LKG
-1
+1
μA
Logic I/O Pin Characteristics (STAT, INT, OTG, /CE, DISC)
Logic low voltage threshold
VIL
0.4
V
Logic high voltage threshold
VIH
1.3
V
I2C Interface (SDA, SCL)
Input high threshold level
VIH
VPULL_UP = 1.8V, SDA and SCL
1.3
V
Input low threshold level
VIL
VPULL_UP = 1.8V, SDA and SCL
0.4
V
Output low threshold level
VOL
ISINK = 5mA
0.4
V
I2C clock frequency
fSCL
400
kHz
Clock Frequency and Watchdog Timer
Clock frequency
fCLK
5
MHz
Watchdog timer
tWDT
REG08h, bits[5:4] = 11
160
s



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