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MP2733 Datasheet(PDF) 36 Page - MPS Industries, Inc.

Part # MP2733
Description  Wide Input Range, 4.5A,I2C-Controlled SW Charger with NVDC Power Path and USB OTG and Enhanced ADC
PDF  51 Pages
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Manufacturer  MPSIND [MPS Industries, Inc.]
Direct Link  http://www.mpsind.com/index.html
Logo MPSIND - MPS Industries, Inc.

MP2733 Datasheet(HTML) 36 Page - MPS Industries, Inc.

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MP2733
– 4.5A SW CHARGER WITH I2C CONTROL, NVDC POWER PATH, USB OTG
MP2733 Rev. 1.1
www.MonolithicPower.com
36
5/18/2023
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2023 MPS. All Rights Reserved.
REG0Ah: BATTFET Configuration
Bit
Name
POR
Reset by
REG_RST
Reset
by WTD
R/W
Description
Comment
7
SW_FREQ
0
Y
Y
R/W
0: 1.35MHz
1: 1MHz
Sets the switching frequency.
This bit is set to 0 by default.
6
TMR2X_EN
1
Y
Y
R/W
0: Disable 2x extended
safety timer
1: Enable 2x extended
safety timer
2x timer enable bit. It is set to
1 by default.
5
BATTFET_DIS
0
N
N
R/W
0: Allow the BATTFET
to turn on
1: Force the BATTFET
off
This bit is set to 0 by default.
4
SYSRST_SEL
1
Y
N
R/W
0: Hardware reset
1: Software reset
System reset selection bit. If
this bit is set to 0, the DISC pin
is pulled low for a time.
Bits[1:0] of this register turn
off the BATTFET for a time
until bits[3:2] turn on the
BATTFET. If this bit is set to 1,
the off time is selected by
bits[3:2]. This bit is set to 1 by
default.
3
tDISC_H[1]
1
Y
Y
R/W
00: 0.5s
01: 2s
10: 4s
11: 8s
These bits determine how
long the DISC pin should be
pulled low (BATTFET off time)
to reset the BATTFET. These
bits are set to 10 by default.
2
tDISC_H[0]
0
Y
Y
R/W
1
tDISC_L[1]
0
Y
Y
R/W
00: 8s
01: 10s
10: 12s
11: 16s
These bits determine how
long the DISC pin should be
pulled low to turn off the
BATTFET. These bits are set
to 00 by default.
0
tDISC_L[0]
0
Y
Y
R/W



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