MP2733 datasheet(26/51 Pages) MPSIND

26 / 51 page

MP2733

– 4.5A SW CHARGER WITH I2C CONTROL, NVDC POWER PATH, USB OTG

MP2733 Rev. 1.1

www.MonolithicPower.com

5/18/2023

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

watchdog

timer

setting

the

WATCHDOG_TIMER_RESET

bit

(REG08h,

bit[3]) to 1 before the watchdog timer expires. If

the watchdog timer expires, some of the

registers are reset to their default values. See

the I2C Register Map on page 29 to determine

which registers are reset after the watchdog

timer expires.

The following actions reset the watchdog timer

and ensure that the IC recovers from a watchdog

timer fault:

• Writing 1 to the

WATCHDOG_TIMER_RESET bit (REG08h,

bit[3])

• Toggling the

WATCHDOG_TIMER_ENABLE bit (disable

first, then enable)

Thermal Regulation and Thermal Shutdown

The MP2733 continuously monitors the internal

junction temperature to maximize power delivery

and avoid overheating the chip. If the internal

junction

temperature

reaches

the

thermal

regulation threshold (set by the TJ_REG bits),

the MP2733 starts to reduce the charge current

to prevent higher power dissipation. During

thermal regulation, the THERM_STAT bit is set

to 1.

If the junction temperature reaches the thermal

shutdown threshold (TJ_SHDN, about 150°C), the

MP2733 turns off the PWM step-down converter

and the BATTFET.

The THERMAL_SHUTDOWN bit in the fault

to the host. Once the junction temperature drops

below the TJ_SHDN hysteresis threshold, the step-

down converter and BATTFET resume normal

operation.

Battery Standby Mode

If only the battery is connected and VBATT

exceeds the VBATT_UVLO threshold, then the

BATTFET turns on and connects the battery to

the system. The

14mΩ BATTFET minimizes

conduction loss during discharge. The MP2733

’s

quiescent current goes as low as

40μA. The low

on resistance and low quiescent current help

extend battery runtime.

There is an over-current limit designed in the

MP2733 to avoid system over-current conditions

while the battery discharges. If the discharge

current exceeds this limit (IDSCHG_LMT) after a 50

μs

blanking time, the discharge FET turns off and

enters hiccup mode. After a 600ms recovery

time, the discharge FET turns on again. If the

discharge current goes high to reach the internal

fast-off current limit (14A), the BATTFET turns

off immediately and enters hiccup mode.

Battery Disconnection Function

applications

where

the

battery

not

removable, it is essential to disconnect the

BATTFET for system reset or shipping mode.

The MP2733 provides both system reset mode

and shipping mode for different applications.

The system auto-reset function is selected by

setting SYSRST_SEL to 1. Once the logic at

DISC is pulled low for longer than 8s (set via the

tDISC_L bit (REG0Ah, bits[1:0])) then the

system is disconnected from the battery by

turning off the BATTFET . After a 4s low period

that can be configured by the tDISC_H bit

(REG0Ah, bits[3:2]), the BATTFET automatically

turns on (see Figure 9).

DISC

VBATT

VSYS

tDISC_L

tDISC_H

Figure 9: System Auto-Reset

The MP2733 can enter and exit shipping mode

through the I2C control of the BATTFET_DIS bit

(REG0Ah, bit[5]). Set BATTFET_DIS to 1 to turn

off the BATTFET after a 10s delay. In battery

standby mode, the delay time is configured by

the tSM_DLY bit. Set BATTFET_DIS to 0 to turn the

BATTFET on again.

The MP2733 can also enter and exit shipping

mode

through

the

DISC

setting

SYSRST_SEL to 0. If the logic at DISC is pulled

low for longer than the time configured by the

tDISC_L bit, the battery FET turns off and the

device enters shipping mode. If the logic at DISC

is pulled low again for time set by the tDISC_H

bit, the battery FET turns on and the device exits

shipping mode (see Figure 10 on page 27). Once

the device exits shipping mode via the DISC pin,

MP2733 Datasheet(PDF) 26 Page - MPS Industries, Inc.

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