ATAM862 datasheet(19/110 Pages) ATMEL

19 / 110 page

4554E–4BMCU–05/06

ATAM862-3

16.3.10

Interrupt Enable (I)

The interrupt enable flag globally enables or disables the triggering of all interrupt routines with

the exception of the non-maskable reset. After a reset or while executing the DI instruction, the

interrupt enable flag is reset, thus disabling all interrupts. The core will not accept any further

interrupt requests until the interrupt enable flag has been set again by either executing an EI or

SLEEP instruction.

16.4

ALU

The 4-bit ALU performs all the arithmetic, logical, shift and rotate operations with the top two ele-

ments of the expression stack (TOS and TOS-1) and returns the result to the TOS. The ALU

operations affects the carry/borrow and branch flag in the condition code register (CCR).

Figure 16-4. ALU Zero-address Operations

16.5

I/O Bus

The I/O ports and the registers of the peripheral modules are I/O mapped. All communication

between the core and the on-chip peripherals take place via the I/O bus and the associated I/O

control. With the microcontroller IN and OUT instructions, the I/O bus allows a direct read or

write access to one of the 16 primary I/O addresses. More about the I/O access to the on-chip

peripherals is described in the section “Peripheral Modules” on page 32. The I/O bus is internal

and is not accessible by the customer on the final microcontroller device, but it is used as the

interface for the microcontroller emulation (see section “Emulation” on page 104).

16.6

Instruction Set

The microcontroller instruction set is optimized for the high level programming language

qFORTH. Many microcontroller instructions are qFORTH words. This enables the compiler to

generate a fast and compact program code. The CPU has an instruction pipeline allowing the

controller to prefetch an instruction from EEPROM at the same time as the present instruction is

being executed. The microcontroller is a zero-address machine, the instructions contain only the

operation to be performed and no source or destination address fields. The operations are

implicitly performed on the data placed on the stack. There are one- and two-byte instructions

which are executed within 1 to 4 machine cycles. A microcontroller machine cycle is made up of

two system clock cycles (SYSCL). Most of the instructions are only one byte long and are exe-

cuted in a single machine cycle. For more information refer to the “MARC4 Programmer’s

Guide”.

TOS-1

CCR

RAM

TOS-2

TOS-3

TOS

ALU

TOS-4

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