ATAM510 datasheet(14/72 Pages) ATMEL

14 / 72 page

4711B–4BMCU–01/05

ATAM510

Note:

If this option is used, the reset is not maskable and will also trigger if the predefined code is written

on to Port A by the CPU itself. Care should also be taken not to generate an unwanted reset by

inadvertently passing through the reset code on input transitions. This applies especially if the

pins have a high capacitive load.

2.6.4

Watchdog Reset

The watchdog’s function can be enabled via a mask option and triggers a reset with every

watchdog counter overflow. To suppress the watchdog reset, the counter must be regularly

reset by reading the watchdog register address (CWD). The CPU reacts in exactly the same

manner as a reset stimulus from any of the above sources.

Figure 2-8.

Normal Mode Start-up

Table 2-3.

Multiple Key Reset Options

NO_RST

Not used (default)

RST2

BPA0 and BPA1 = low

RST3

BPA0 and BPA1 and BPA2 = low

RST4

BPA0 and BPA1 and BPA2 and BPA3 = low

RST5

BPA0 and BPA1 = high

RST6

BPA0 and BPA1 and BPA2 = high

RST7

BPA0 and BPA1 and BPA2 and BPA3 = high

Reset

Configuration period

Power-on reset delay

Application program

execution

250 ms

80 ms

Program defined

Input mode

Program defined

No pull-up/-down

New configuration

Old config.

NRST

Port

status

Pull-up/

pull-down

configuration

Device

status

New configuration

No pull-up/-down

ATAM510 Datasheet(PDF) 14 Page - ATMEL Corporation

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