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ATAM510 Datasheet(PDF) 6 Page - ATMEL Corporation |
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ATAM510 Datasheet(HTML) 6 Page - ATMEL Corporation |
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6 / 72 page ![]() 6 4711B–4BMCU–01/05 ATAM510 2.2 Components of MARC4 Core The core contains ROM, RAM, ALU, a program counter, RAM address registers, an instruction decoder and an interrupt controller. The following sections describe each functional block in more detail. 2.2.1 EEPROM The program memory (EEPROM) is programmed with the customer application program. The EEPROM is addressed by a 12-bit wide program counter, thus predefining a maximum program bank size of 4 Kbytes. The lowest user ROM address segment is taken up by a 512-byte zero page which contains predefined start addresses for interrupt service routines and special sub- routines accessible with single byte instructions (SCALL). The corresponding memory map is shown in Figure 2-2. Look-up tables of constants can also be held in EEPROM and are accessed via the MARC4’s built-in table instruction. Figure 2-2. EEPROM Map of the ATAM510 2.2.2 RAM The MARC4 contains 256 x 4-bit wide static random access memory (RAM). It is used for the expression stack, the return stack and data memory for variables and arrays. The RAM is addressed by any of the four 8-bit wide RAM address registers SP, RP, X and Y. Figure 2-3. RAM Map EEPROM (4K x 8 bit) Zero page FFFh 1FFh 000h FFFh 1F0h 1F8h 010h 018h 000 h 008h 020 h 1E8h 1E0h 140h 180h 040h 0C 0h 008h $A U T O SL E E P $R E SE T INT0 INT1 INT2 INT 3 INT4 INT5 INT 6 INT7 1E0h 1C 0h 100h 080h Zer o page 000h RAM FCh 00h Autosleep FFh 03h 04h X Y SP RP TOS-1 Expression stack Return stack Global variables 07h (256 x 4-bit) Global variables 4-bit TOS TOS-1 TOS-2 30 SP Expression stack Return stack 0 11 12-bit RP v |
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