ATAM510 datasheet(39/72 Pages) ATMEL

39 / 72 page

4711B–4BMCU–01/05

ATAM510

By using the Timer/Counter I/O Control Register (TCIOR) the program can configure the respec-

tive Port 4 pins as either standard data I/O ports or as external signal ports for the Timer 0 and

Buzzer. The Timer 1 uses a dedicated I/O pin TIM1, whose direction is controlled solely by the

TCCR (see Figure 3-12). It should be noted that if a TCIOR bit is set low, then the corresponding

port data direction register (P4DDR) bit no longer influences the port direction. In the case of

BP40 and BP41, the port direction is then controlled entirely by the timer/counter configuration

registers (TCCR,T0MO), while pins BP42 and BP43 become uni-directional buzzer outputs.

Figure 3-12. Timer/Counter and Buzzer External Interface

Table 3-11.

Timer/Counter I/O Control Register (TCIOR)

Code

3 2 1 0

Function

x x x 1

BP40 - standard port mode

x x x 0

BP40 - Timer 0 clock input (T0IN0) or Timer 0 output (T0OUT0)

x x 1 x

BP41 - standard port mode

x x 0 x

BP41 - Timer 0 gate input (T0IN1) or Timer 0 output (T0OUT1)

x 1 x x

BP42 - standard port mode

x 0 x x

BP42 - Buzzer output (BUZ)

1 x x x

BP43 - standard port mode

0 x x x

BP43 - Buzzer output (NBUZ)

BP40

BUZZER

BUZ

NBUZ

TIMER 0

T0IN0

T0IN1

T0OUT0

T0OUT1

TIMER 1

T1IN

T1OUT

P4DAT0

P4DDR0

BP41

P4DAT1

P4DDR1

BP42

P4DAT2

P4DDR2

BP43

TIM1

TCCR

TCIO0

PWM,PDM

Melody,Counter

T0MO

to CPU

Select Ext. Clock

to CPU

TCIO1

to CPU

TCIO2

'0'

P4DAT3

P4DDR3

to CPU

TCIO3

'0'

ATAM510 Datasheet(PDF) 39 Page - ATMEL Corporation

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