ATAM510 datasheet(45/72 Pages) ATMEL

45 / 72 page

4711B–4BMCU–01/05

ATAM510

Figure 3-14. Timer 0 Free Running Counter Mode

3.5.3.7

Timer 0 Counter Reload Modes (Strobe and 50% Duty Cycle)

As in the free running mode, the counter can also be clocked from either an external signal on

BP40 or from an internal clock source. In this mode, the counter repetition period is completely

defined by the contents of the compare register (T0CP) (see Figure 3-15). The counter counts

up with the selected clock frequency. When it reaches the value held in the compare register,

the counter then returns to the zero state. At the same time, depending on the selected timer

mode, the BP41 either toggles or generates a strobe pulse. If the Timer 0 interrupt is unmasked,

a compare interrupt is also generated.

The resultant output frequency f

OUT = fIN/2 × (n+1) where

n = compare value (n = 1 - 255).

Figure 3-15. Timer 0 Counter Reload Mode

Timer

Clock

T0OUT1

(BP41)

Overflow

Interrupt

Timer = compare register (= 4)

Timer resets

on overflow

255

Timer

State

strobe

50% duty

cycle

35 6

255

35 6

Timer

Clock

T0OUT1

(BP41)

Compare

Interrupt

Timer = compare register (= 7)

Resets timer

Timer

State

50% duty

cycle

strobe

35 6

7 0

35 6

7 0

35 6

ATAM510 Datasheet(PDF) 45 Page - ATMEL Corporation

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