CIRCC datasheet(31/70 Pages) SMSC

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TABLE 18 - IRCC LOGICAL BLOCK CONTROLS

MODE

DESCRIPTION

COM

16550 UART COM Port (default)

IrDA SIR - A

Up to 115.2 kbps, Variable 3/16 Pulse

ASK IR

Amplitude Shift Keyed Ir Interface

IrDA SIR - B

Up to 115.2 kbps, Fixed 1.6

µs Pulse

Reserved

CONSUMER

Remote Control

RAW IR

Direct IR Diode Control

Reserved

Half Duplex, bit 2

When Half Duplex is zero (default), the 16C550A

is in full duplex mode. The Half Duplex bit only

supports the 16C550A UART; i.e., this bit has no

effect on the CIrCC SCE. The Half Duplex bit is

analogous to the chip-level configuration register

Half Duplex bit and has the same effect on the

UART. Provisions have been made in legacy

devices to accommodate Half Duplex selection

through

either

the

chip-level

configuration

registers or the CIrCC Half Duplex bit; i.e., the

last write from either source determines the

current mode selection and is visible in both

registers.

Tx/Rx Polarity Bits, 0 - 1

The Tx and Rx Polarity bits define the active

states for signals entering and exiting the Output

Multiplexer ports.

Internal CIrCC Active states

are typically decoded as zero. The Tx Polarity bit

default is one; the Rx Polarity bit default is zero.

For backward compatibility, the Tx and Rx

Polarity bits do not apply to COM mode; i.e.,

when the Block Control bits are zero.

The

relationship between the Output Multiplexer port

signals and the Polarity bits is an exclusive-or

(Table 19). For example, if the IRRx pin in the

Output Multiplexer is one and the Rx Polarity bit

is zero, the signal is inactive and therefore

decoded as a one. The CIrCC Tx Polarity bit (bit

1) is equivalent to the Transmit Polarity bit in the

chip-level configuration space of earlier devices;

e.g., the FDC37C93x IR Option Register, Serial

Port 2, Logical Device 5, Register 0xF1. The Rx

Polarity bit (bit 0) is equivalent to the Receive

Polarity bit in the same register. Provisions have

been made in legacy devices to accommodate

Polarity bit selection through either the chip-level

configuration registers or the SCE registers; i.e.,

the last write from either source determines the

current Polarity bit value and is visible in both

registers.

Table 19 - Tx/Rx Polarity Bit Effects

SIGNAL

POLARITY BIT

DECODED SIGNAL

CIRCC Datasheet(PDF) 31 Page - SMSC Corporation

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