VT6103 datasheet(25/46 Pages) VIA

25 / 46 page

VT6103 - Fast Ethernet 10 / 100 PHY / Transceiver

Revision 1.1 April 15, 2002

-19-

Functional Description

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Nibble-Wide MII Data Interface

Clause 22 of the IEEE 802.3u specification defines the Media

Independent Interface.

This interface includes a dedicated

receive bus and a dedicated transmit bus.

These two data

buses, along with various control and indicate signals, allow

for the simultaneous exchange of data between the VT6103

and the upper layer agent (MAC or repeater). The receive

interface consists of a nibble wide data bus RXD[3:0], a

receive error signal RXER, a receive data valid flag RXDV,

and a receive clock RXC for synchronous transfer of the data.

The receive clock can operate at either 2.5 MHz to support 10

Mb/s operation modes or at 25 MHz to support 100 Mb/s

operational modes. The transmit interface consists of a nibble

wide data bus TXD[3:0], a transmit error flag TXER, a

transmit enable control signal TXEN, and a transmit clock

TXC which runs at either 2.5 MHz or 25 MHz. Additionally,

the MII includes the carrier sense signal CRS, as well as a

collision detect signal COL.

The CRS signal asserts to

indicate the reception of data from the network or as a

function of transmit data in Half Duplex mode. The COL

signal asserts as an indication of a collision which can occur

during half-duplex operation when both a transmit and a

receive operation occur simultaneously.

Collision Detect

For Half Duplex, a 10Base-T or 100Base-X collision is

detected when the receive and transmit channels are active

simultaneously. Collisions are reported by the COL signal on

the MII.

If the VT6103 is transmitting in 10 Mb/s mode when a

collision is detected, the collision is not reported until seven

bits have been received while in the collision state.

This

prevents a collision from being reported incorrectly due to

noise on the network. The COL signal remains set for the

duration of the collision. If a collision occurs during a receive

operation, it is immediately reported by the COL signal.

When heartbeat is enabled (only applicable to 10 Mb/s

operation), approximately 1 ms after the transmission of each

packet, a Signal Quality Error (SQE) signal of approximately

10 bit times is generated (internally) to indicate successful

transmission. SQE is reported as a pulse on the COL signal of

the MII.

Carrier Sense

Carrier Sense (CRS) may be asserted due to receive activity,

once valid data is detected via the Smart Squelch function

during 10 Mb/s operation.

For 10 Mb/s Half Duplex

operation, CRS is asserted during either packet transmission

or reception.

For 10 Mb/s Full Duplex operation, CRS is

asserted only due to receive activity.

CRS is deasserted

following an end of packet. In Repeater mode (pin 63 / bit 9,

activity.

MII Isolate Mode

A 100Base-X PHY connected to the mechanical MII inter-

face specified in IEEE 802.3u is required to have a default

value of one in bit 10 of the Basic Control Register (BCR,

address 00h.). The VT6103 will set this bit to one if the PHY

Address is set to 00000 upon power-up / hardware Reset.

Otherwise, the VT6103 will set this bit to zero upon power-up

/ hardware reset. With bit 10 in the BMCR set to one, the

VT6103 does not respond to packet data present at TXD[3:0],

TXEN, and TXER inputs and presents a high impedance on

the TXCK, RXCK, RXDV, RXER, RXD[3:0], COL, and CRS

outputs. The VT6103 will continue to respond to all serial

management transactions over the MII.

While in Isolate

mode, the TX

+ / ΤX− outputs are dependent on the current

state of Auto-Negotiation. The VT6103 can Auto-Negotiate

or parallel detect to a specific technology depending on the

receive signal at the RX

+ / RX− inputs. It is recommended

that the user have a basic understanding of clause 22 of the

802.3u standard.

VT6103 Datasheet(PDF) 25 Page - VIA Technologies, Inc.

VT6103 Datasheet(HTML) 25 Page - VIA Technologies, Inc.

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