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33742 Datasheet(PDF) 26 Page - Freescale Semiconductor, Inc |
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33742 Datasheet(HTML) 26 Page - Freescale Semiconductor, Inc |
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26 / 65 page ![]() Analog Integrated Circuit Device Data 26 Freescale Semiconductor 33742 FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES APPLICATION WAKE-UP FROM THE 33742 When the application is in Stop mode, it can be awakened from the SBC side. When a wake-up condition is detected by the SBC (for example, CAN, wake-up input), the 33742 enters the Normal Request mode and generates an interrupt pulse at the INT pin. APPLICATION WAKE-UP FROM THE MCU When the device is in the Stop mode, a wake-up event may come from the system MCU. In this case the MCU selects the device the using a LOW-to-HIGH transition on the 33742 CS pin. Then the 33742S goes into Normal Request mode and generates an interrupt pulse at the INT pin. STOP MODE CURRENT MONITOR If the VDD output current exceeds an internal set threshold (IDDS-WU), the SBC automatically enters the Normal Request mode and generates an interrupt at the INT pin. The interrupt is a non-maskable and the INTR register will have no flag set. INTERRUPT GENERATION WHEN WAKE-UP FROM STOP MODE When the SBC wakes from Stop mode, it first enters the Normal Request mode before generating a 10 µs typical pulse on the INT pin. These are non-maskable interrupts with the wake-up event read through the SPI registers, the CANWU bit in the CAN Register (CANR), or the LCTRx bit in the Wake-Up Register (WUR). In case of wake-up from Stop mode overcurrent situation or from forced wake-up, no bits are set. After the INT pulse, the 33742 accepts SPI command after a time delay (tS-1STSPI). WATCHDOG SOFTWARE IN STOP MODE If the SBC watchdog is enabled, the application must provide a “system ok” response before the end of the 33742 watchdog time. Typically an MCU initiates the wake-up of the 33742 through the SPI wake-up (CS activation). The SBC will awaken and jump into the Normal Request mode. The MCU has to configure the 33742 to go to either Normal or Standby mode. The MCU can then decide to return to the Stop mode. If no MCU wake-up occurs within the watchdog time period, the SBC activates the RST pin and jumps into the Normal Request mode. The MCU can then be re-initialized. STOP MODE ENTER COMMAND Stop mode is entered at the end of the SPI message at the rising edge of the CS. (Refer to the t CS-STOP data in the Dynamic Electrical Characteristics table on page 17.) Once Stop mode is entered, the SBC can wake up from a VDD regulator overcurrent detection state. In order to allow time for the MCU to complete the last CPU instruction and enter its low power mode, a deglitcher time of 40 µs typical is implemented. Figure 11, page 27, depicts the operation of entering the Stop mode. Stop VDD: ON (Limited Current Capability), V2: OFF, HS:OFF or Cyclic Sense CAN, SPI, L0:L3, Cyclic Sense, Forced Wake-Up, IDD Overcurrent (39) Normally HIGH. Active LOW if WDOG (40) or VDD undervoltage occurs Signal 33742S wake-up and IDD > IDDS-WU (not maskable) Running if enabled. Not running if disabled Low power. Wake-up capability if enabled Sleep VDD: OFF, V2: OFF, HS: OFF or Cyclic CAN, SPI, L0:L3, Cyclic Sense Forced Wake-Up LOW Not Active Not running Low power. Wake-up capability if enabled Normal Debug (38) Same as Normal – Normally HIGH. Active LOW if VDD undervoltage occurs Same as Normal Not running Same as Normal Standby Debug (38) Same as Standby – Normally HIGH. Active LOW if VDD undervoltage occurs Same as Standby Not running Same as Standby Stop Debug (38) Same as Stop Same as Stop Normally HIGH. Active LOW if VDD undervoltage occurs Same as Stop Not running Same as Stop Flash Programming Forced externally – Not operating Not operating Not operating Not operating Notes 38. Mode entered via special sequence described under the heading Debug Mode: Hardware and Software Debug with the 33742 beginning on page 30. 39. IDD overcurrent always enabled. 40. WDOG if enabled. |
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