33742 datasheet(46/65 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33742

FUNCTIONAL DEVICE OPERATION

LOGIC COMMANDS AND REGISTERS

WAKE-UP REGISTER (WUR)

Tables 27 through 29 contain the Wake-Up Register information. Local wake-up inputs L0:L3 can be used in both Normal and

Standby modes as port expander, as well as for waking up the SBC from Sleep or Stop modes (Table 27).

Wake-up inputs can be configured by pair. L0 and L1 can

be configured together, and L1 and L2, and L2 and L3 can be

configured together (Table 28).

Table 25. HSON Control Bits

Logic

HS State

HS OFF, in Normal and Standby modes.

HS ON, in Normal and Standby modes. (57).

Notes

57.

When HS is turned OFF due to an overtemperature condition, it can be turned ON again by setting the appropriate control bit to 1. Error

bits are latched in the IOR register.

Table 26. Input/Output Register Status Bits

Name

Logic

Description

V2LOW

V2LTH > 4.0 V.

V2LTH < 4.0 V.

HSOT

No HS overtemperature.

HS overtemperature.

VSUPLOW

VBF(EW) > 5.8 V.

VBF(EW) < 5.8 V.

DEBUG

SBC not in Debug mode.

SBC accepts command to go to Debug modes (no Watchdog).

Table 27. Wake-Up Register

WUR

R/W

$100b

LCTR3

LCTR2

LCTR1

LCTR0

L3WU

L2WU

L1WU

L0WU

Reset Value

–

Reset Condition (Write) (58)

–

POR, NR2R, N2R, STB2R, STO2R

Notes

58.

See Table 13, page 42, for definitions of reset conditions.

33742 Datasheet(PDF) 46 Page - Freescale Semiconductor, Inc

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