33742 datasheet(19/65 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33742

ELECTRICAL CHARACTERISTICS

DYNAMIC ELECTRICAL CHARACTERISTICS

STATE MACHINE TIMING (CS, SCLK, MOSI, MISO, WDOG, INT) (CONTINUED)

Delay Between SPI and CAN Normal Mode (33)

Normal Mode (34)

tS-CAN_N

—

µs

Delay Between SPI and CAN Sleep Mode (33)

Normal Mode (34)

tS-CAN_S

—

µs

Delay Between CS Wake-Up (CS LOW to HIGH) and Device in Normal

Request Mode (VDD ON and RST HIGH)

Stop Mode

tW-CS

µs

Delay Between CS Wake-Up (CS LOW to HIGH) and First Accepted SPI

Command

Device in Stop Mode After Wake-Up

tW-SPI

—

N/A

µs

Delay Between INT Pulse and First SPI Command Accepted

Device in Stop Mode After Wake-Up

tS-1STSPI

—

N/A

µs

Delay Between Two SPI Messages Addressing the Same Register

t2SPI

—

µs

OUTPUT PIN (VDD)

Reset Delay Time

Measured at 50% of Reset Signal

4.0

—

µs

IDD Overcurrent to Wake-Up Deglitcher Time (34)

tIDD-DGLT

µs

OUTPUT PIN

(RST)

Reset Duration After VDD HIGH

33742

33742S

tRSTDUR

tRSTDURS

3.0

3.5

4.0

INPUT PINS (L0, L1, L2, AND L3)

Wake-Up Filter Time

tWUF

8.0

µs

Notes

33.

Delay starts at falling edge of clock cycle #8 of the SPI command and start of “Turn ON” or “Turn OFF” of HS or V2.

34.

Guaranteed by design; it is not production tested.

Table 6. Dynamic Electrical Characteristics (continued)

Characteristics noted under conditions 4.75 V

≤ V2 ≤ 5.25 V, 5.5 V ≤ VSUP ≤ 18 V, and -40°C ≤ TA ≤ 125°C. Typical values

noted reflect the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise noted.

Characteristic

Symbol

Min

Typ

Max

Unit

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