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ADATE207 Datasheet(PDF) 30 Page - Analog Devices

Part # ADATE207
Description  Quad Pin Timing Formatter
PDF  36 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADATE207 Datasheet(HTML) 30 Page - Analog Devices

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ADATE207
Rev. 0 | Page 30 of 36
Position
Description
Reset State
Bits[10:08]
PAT_DUTDATA2 Select. A binary encoded data field that selects which edge and which comparator
to drive out of the ADATE207 PAT_DUTDATAx[2] pin.
0x0
0x0 = Edge D0 low comparator.
0x1 = Edge D0 high comparator.
0x2 = Edge D1 low comparator.
0x3 = Edge D1 high comparator.
0x4 = Edge D2 low comparator.
0x5 = Edge D2 high comparator.
0x6 = Edge D3 low comparator.
0x7 = Edge D3 high comparator.
Bit 07
Not Used
0
Bits[06:04]
PAT_DUTDATA1 Select. A binary encoded data field that selects which edge and which comparator
to drive out of the ADATE207 PAT_DUTDATAx[1] pin.
0x0
0x0 = Edge D0 low comparator.
0x1 = Edge D0 high comparator.
0x2 = Edge D1 low comparator.
0x3 = Edge D1 high comparator.
0x4 = Edge D2 low comparator.
0x5 = Edge D2 high comparator.
0x6 = Edge D3 low comparator.
0x7 = Edge D3 high comparator.
Bit 03
Not Used
0
Bits[02:00]
PAT_DUTDATA0 Select. A binary encoded data field that selects which edge and which comparator
to drive out of the ADATE207 PAT_DUTDATAx[0] pin.
0x0
0x0 = Edge D0 low comparator.
0x1 = Edge D0 high comparator.
0x2 = Edge D1 low comparator.
0x3 = Edge D1 high comparator.
0x4 = Edge D2 low comparator.
0x5 = Edge D2 high comparator.
0x6 = Edge D3 low comparator.
0x7 = Edge D3 high comparator.
CHIP-SPECIFIC (COMMON) REGISTERS
Name:
Software Resets
Address:
0x19
Type:
Write
Table 33. Software Resets
Position
Description
Reset State
Bit 15
DLL Ready. Indicates that the internal PLL and DLL are stable after a reset and/or MCLK change.
Dynamic
Bits[14:04]
Not Used.
0x000
Bit 03
Error Registers Clear.
0x0
Writing a 1 to this bit creates a pulse to clear all the delay generation errors for all channels and
resets the edge generation logic.
Writing a 0 has no affect.
Bit 02
Accumulated Fail Registers Clear.
0x0
Writing a 1 to this bit creates a pulse to clear the accumulated fail registers for all channels.
Writing a 0 has no affect.



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