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DSP56300FM/AD Datasheet(PDF) 30 Page - Freescale Semiconductor, Inc |
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DSP56300FM/AD Datasheet(HTML) 30 Page - Freescale Semiconductor, Inc |
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30 / 64 page ![]() DSP56374 Data Sheet, Rev. 4.2 External Clock Operation Freescale Semiconductor 30 If the DSP56374 system clock is an externally supplied square wave voltage source, it is connected to EXTAL (Figure 2.). When the external square wave source connects to EXTAL, the XTAL pin is not used. Figure 2. External Clock Timing Table 19. Clock Operation No. Characteristics Symbol Min Max Units 6 EXTAL input high 1 (40% to 60% duty cycle) Eth 3.33 50 ns 7 EXTAL input low2 (40% to 60% duty cycle) Etl 3.33 50 ns 8 EXTAL cycle time • With PLL disabled • With PLL enabled Etc 6.67 50 inf 200 ns 9 Instruction cycle time= ICYC = TC 3 • With PLL disabled • With PLL enabled Icyc 6.67 6.67 inf 13.33 ns Suggested component values: fosc = 24.576 MHz R = 1 M ±10% C (EXTAL)= 18 pF Calculations are for a 12 - 49 MHz crystal with the following parameters: • shunt capacitance (C0) of 10 pF - 12 pF • series resistance 40 Ohm C (XTAL) = 47 pF • drive level of 10 µW EXTAL VIL VIH Midpoint Note: The midpoint is 0.5 (VIH + VIL). ETH ETL ETC 7 8 6 |
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