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DSP56300FM/AD Datasheet(PDF) 36 Page - Freescale Semiconductor, Inc |
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DSP56300FM/AD Datasheet(HTML) 36 Page - Freescale Semiconductor, Inc |
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36 / 64 page  DSP56374 Data Sheet, Rev. 4.2 Serial Host Interface SPI Protocol Timing Freescale Semiconductor 36 27 SS assertion to first SCK edge CPHA = 0 Slave Bypassed 2.0 x TC + 12.6 26 — ns Very Narrow 2.0 x TC + 2.6 16 — ns Narrow 2.0 x TC − 37.4 5 0— ns Wide 2.0 x TC − 87.4 5 0— ns CPHA = 1 Slave Bypassed — 10 — ns Very Narrow — 0 — ns Narrow — 0 — ns Wide — 0 — ns 28 Last SCK edge to SS not asserted Slave Bypassed — 12 — ns Very Narrow — 22 — ns Narrow — 100 — ns Wide — 200 — ns 29 Data input valid to SCK edge (data input set-up time) Master /Slave Bypassed — 0 — ns Very Narrow — 0 — ns Narrow — 0 — ns Wide — 0 — ns 30 SCK last sampling edge to data input not valid Master /Slave Bypassed 3.0 x TC 20 — ns Very Narrow 3.0 x TC + 23.2 43.2 — ns Narrow 3.0 x TC + 53.2 73.2 — ns Wide 3.0 x TC + 80 100.0 — ns 31 SS assertion to data out active Slave — — 5 — ns 32 SS deassertion to data high impedance2 Slave — — — 9 ns 33 SCK edge to data out valid (data out delay time) Master /Slave Bypassed 3.0 x TC + 26.1 — 46.2 ns Very Narrow 3.0 x TC + 90.4 — 110.4 ns Narrow 3.0 x TC + 116.4 — 136.4 ns Wide 3.0 x TC + 203.4 — 223.4 ns 34 SCK edge to data out not valid (data out hold time) Master /Slave Bypassed 2.0 x TC 13.4 — ns Very Narrow 2.0 x TC + 1.6 15 — ns Narrow 2.0 x TC + 41.6 55 — ns Wide 2.0 x TC + 91.6 105 — ns 35 SS assertion to data out valid (CPHA = 0) Slave — — — 12.0 ns Table 21. Serial Host Interface SPI Protocol Timing (continued) No. Characteristics1,3,4 Mode Filter Mode Expression Min Max Unit |
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