XRT83SL314 datasheet(71/83 Pages) EXAR

71 / 83 page

XRT83SL314

14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT

REV. 1.0.1

TABLE 48: MICROPROCESSOR REGISTER 0XE7H BIT DESCRIPTION

BYTEsel

LCV Counter Byte Select

This bit is used to select the MSB or LSB for Reading the contents

of the LCV counter for a given channel. The channel is addressed

by using bits D[3:0] in register 0xE5h. By default, the LSB byte is

selected.

0 = Low Byte

1 = High Byte

R/W

chUPDATE LCV Counter Update Per Channel

This bit is used to latch the contents of the counter for a given

channel into a holding register so that the value of the counter can

be read. The channel is addressed by using bits D[3:0] in register

0xE5h.

0 = Normal Operation

1 = Updates the Selected Channel

R/W

Reserved

LCV Counter Reset Per Channel

This bit is used to reset the LCV counter of a given channel to its

default state 0000h. The channel is addressed by using bits D[3:0]

in register 0xE5h. This bit must be set to "1" for 1

µS.

0 = Normal Operation

1 = Resets the Selected Channel

R/W

GLOBAL REGISTER (0XE7H)

BIT

NAME

FUNCTION

Type

Default

Value

(HW reset)

Reserved

This Register Bit is Not Used

R/W

Reserved

This Register Bit is Not Used

R/W

Reserved

This Register Bit is Not Used

R/W

Reserved

This Register Bit is Not Used

R/W

Reserved

This Register Bit is Not Used

R/W

Reserved

This Register Bit is Not Used

R/W

Reserved

This Register Bit is Not Used

R/W

Reserved

This Register Bit is Not Used

R/W

GLOBAL REGISTER (0XE6H)

BIT

NAME

FUNCTION

Type

Default

Value

(HW reset)

XRT83SL314 Datasheet(PDF) 71 Page - Exar Corporation

XRT83SL314 Datasheet(HTML) 71 Page - Exar Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83

Datasheet Download

Link URL