XRT83SL314 datasheet(74/83 Pages) EXAR

74 / 83 page

XRT83SL314

REV. 1.0.1

14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT

ALLT1/E1

T1/E1 Control

This bit is used to reduce system noise and power consumption. If

the ALL T1/E1 mode is enabled, all output clock references

(excluding the 8kHzout in E1 mode only) are internally shut off. By

default, the ALL T1/E1 mode is enabled.

0 = Enabled (reduce clock switching and power consumption)

1 = Disabled (all clock references are available)

R/W

TCLKCNL

Transmit Clock Control

This bit is used to select the transmit output activity at TTIP/TRING

when TCLK is either pulled "Low", pulled "High", or missing.

0 = Transmit All Zeros

1 = TAOS (Transmit All Ones)

R/W

CLKSEL3

CLKSEL2

CLKSEL1

CLKSEL0

Clock Input Select

CLKSEL[3:0] is used to select the input clock source used as the

internal timing reference.

0000 = 2.048 MHz

0001 = 1.544 MHz

0010 = 8 kHz

0011 = 16 kHz

0100 = 56 kHz

0101 = 64 kHz

0110 = 128 kHz

0111 = 256 kHz

1000 = 4.096 Mhz

1001 = 3.088 Mhz

1010 = 8.192 Mhz

1011 = 6.176 Mhz

1100 = 16.384 Mhz

1101 = 12.352 Mhz

1110 = 2.048 Mhz

1111 = 1.544 Mhz

R/W

GLOBAL REGISTER (0XE9H)

BIT

NAME

FUNCTION

Type

Default

Value

(HW reset)

XRT83SL314 Datasheet(PDF) 74 Page - Exar Corporation

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