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AD5940 Datasheet(PDF) 30 Page - Analog Devices

Part # AD5940
Description  High Precision, Impedance, and Electrochemical Front End
PDF  143 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5940 Datasheet(HTML) 30 Page - Analog Devices

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Data Sheet
AD5940/AD5941
LOW POWER DAC
analog.com
Rev. D | 30 of 143
The ultra low power DAC is a dual output string DAC that sets the
bias voltage of the sensor. There are two output resolution formats:
12-bit resolution (VBIAS0) and 6‑bit resolution (VZERO0).
In normal operation, the 12-bit output sets the voltage on the
reference electrode and counter electrode pins, RE0 and CE0, via
the potentiostat circuit. This voltage can also be sent to the VBIAS0
pin by configuring the SW12 switch (see Figure 22). An external
filtering capacitor can be connected to the VBIAS0 pin.
The 6-bit output sets the voltage to the positive low power TIA inter-
nal node that connects to the ADC mux, LPTIA_P. The voltage on
the sense electrode is equal to this pin. This voltage is referred to
as VZERO0 and can be connected to the VZERO0 pin by configuring
the SW13 switch (see Figure 22). In diagnostic mode, the VZERO0
output can also be connected to the high speed TIA by setting Bit 5
in the LPDACCON0 register to 1.
The low power DAC reference source is a low power, 2.5 V
reference.
The low power DACs are made up of two 6-bit string DACs. The
main 6-bit string DAC provides the VZERO0 DAC output, and is
made up of 63 resistors. Each resistor is the same value.
The main 6-bit string with the 6-bit subDAC provides the VBIAS0
DAC output. In 12-bit mode, the MSBs select a resistor from the
main string DAC. The top end of this resistor is selected as the top
of the 6-bit subDAC, and the bottom end of the selected resistor is
connected to the bottom of the 6-bit subDAC string, as shown in
Figure 18.
The resistor matching between the 12-bit and 6-bit DACs means 64
LSB12 (VBIAS0) is equal to one LSB6 (VZERO0).
The output voltage range is not rail to rail. Rather, it ranges from 0.2
V to 2.4 V for the 12-bit output of the low power DAC. Therefore,
the LSB value of the 12-bit output (12-BIT_ DAC_LSB) is
12‐BIT_DAC_LSB= 2.2 V212 − 1=537.2 µV (3)
The 6-bit output range is from 0.2 V to 2.366 V. This range is not
0.2 V to 2.4 V because there is a voltage drop across R1 in the
resistor string (see Figure 18). The LSB value of the 6-bit output
(6-BIT_DAC_LSB) is
6-BIT_DAC_LSB = 12-BIT_DAC_LSB × 64 = 34.38 mV
(4)
To set the output voltage of the 12-bit DAC, write to LPDACDAT0,
Bits[11:0]. To set the 6-bit DAC output voltage, write to LPDAC-
DAT0, Bits[17:12].
If the system clock is 16 MHz, LPDACDAT0 takes 10 clock cycles
to update. If system clock is 32 kHz, LPDACDAT0 takes one clock
cycle to update. Take these values into consideration when using
the sequencer.
The following code demonstrates how to correctly set the LPDAC-
DAT0 value:
SEQ_WR(REG_AFE_LPDACDAT0, 0x1234);
SEQ_WAIT(10); // Wait 10 clocks for LPDACDAT0
to update
SEQ_SLP();
Optionally, the waveform generator described in the Waveform
Generator section can be used as the DAC codes source for the
low power DAC. When using the waveform generator with the
low power DAC, ensure that the settling time specification of the
low power DAC is not violated. The system clock source must be
the 32 kHz oscillator. This feature is provided for ultra low power,
always on, low frequency measurements, such as skin impedance
measurements where the excitation signal is approximately 100 Hz
and system power consumption needs to be <100 μA.
LOW POWER DAC SWITCH OPTIONS
There are a number of switch options available that allow the
user to configure the low power DAC for various modes of opera-
tion. These switches facilitate different use cases, such as electro-
chemical impedance spectroscopy. Figure 22 shows the available
switches, labeled SW0 to SW4. These switches are controlled
either automatically via Bit 5 in the LPDACCON0 register, or individ-
ually via the LPDACSW0 register
When LPDACCON0, Bit 5, is cleared, the switches are configured
for normal mode. The SW2 switch and the SW3 switch are closed
and the SW0, SW1, and SW4 switches are open. When LPDAC-
CON0, Bit 5, is set, the switches are configured for diagnostic
mode. The SW0 switch and the SW4 switch are closed and the
remaining switches are open. This feature is designed for electro-
chemical use cases, such as continuous glucose measurement
where, in normal mode, the low power TIA measures the sense
electrode. Then, in diagnostic mode, the high speed TIA measures
the sense electrode. By switching the VZERO0 voltage output from
the low power TIA to the high speed TIA, the effective bias on
the sensor, VBIAS0 − VZERO0, is unaffected. Using the high speed
TIA facilitates high bandwidth measurements, such as impedance,
ramp, and cyclic voltammetry.
Use the LPDACSW0 register to control the switches individually.
LPDACSW0, Bit 5, must be set to 1. Then, each switch can be
individually controlled via LPDACSW0, Bits[4:0].



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