AM3359 datasheet(151/256 Pages) TI1

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AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351

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SPRS717L – OCTOBER 2011 – REVISED MARCH 2020

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Peripheral Information and Timings

Complete stackup specifications are provided in Table 7-36.

Table 7-36. PCB Stackup Specifications(1)

NO.

PARAMETER

MIN

TYP

MAX

UNIT

PCB routing and plane layers

Signal routing layers

Full ground layers under LPDDR routing region

Number of ground plane cuts allowed within LPDDR routing region

Full VDDS_DDR power reference layers under LPDDR routing region

Number of layers between LPDDR routing layer and reference ground

plane

PCB routing feature size

mils

PCB trace width, w

mils

PCB BGA escape via pad size(2)

mils

PCB BGA escape via hole size(2)

mils

Single-ended impedance, Zo(3)

Impedance control(4)(5)

Zo-5

Zo+5

(1) For the LPDDR device BGA pad size, see the LPDDR device manufacturer documentation.

(2) A 20-10 via may be used if enough power routing resources are available. An 18-10 via allows for more flexible power routing to the

AM335x device.

(3) Zo is the nominal singled-ended impedance selected for the PCB.

(4) This parameter specifies the AC characteristic impedance tolerance for each segment of a PCB signal trace relative to the chosen Zo

defined by the single-ended impedance parameter.

(5) Tighter impedance control is required to ensure flight time skew is minimal.

AM3359 Datasheet(PDF) 151 Page - Texas Instruments