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H838024 Datasheet(PDF) 193 Page - Renesas Technology Corp |
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H838024 Datasheet(HTML) 193 Page - Renesas Technology Corp |
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193 / 697 page ![]() Section 6 ROM Rev. 7.00 Mar 10, 2005 page 151 of 652 REJ09B0042-0700 Figure 6.5 shows a PROM write/verify timing diagram. Write Input data Output data Verify Address Data VPP VPP tAS tAH tDS tDH tDF tOE tOES tPW tOPW* tVPS tVCS tCES VCC VCC CE PGM OE VCC+1 VCC Note: * tOPW is defined by the value shown in figure 6.4, High-Speed, High-Reliability Programming Flowchart. Figure 6.5 PROM Write/Verify Timing |
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