H838024 datasheet(201/697 Pages) RENESAS

201 / 697 page

Section 6 ROM

Rev. 7.00 Mar 10, 2005 page 159 of 652

REJ09B0042-0700

Bit 6—Software Write Enable (SWE)

This bit is to set enabling/disabling of programming/enabling of flash memory (set when bits 5 to

0 and the EBR register are to be set).

Bit 6

SWE

Description

Programming/erasing is disabled. Other FLMCR1 register bits and all EBR bits

cannot be set.

(initial value)

Flash memory programming/erasing is enabled.

Bit 5—Erase Setup (ESU)

This bit is to prepare for changing to erase mode. Set this bit to 1 before setting the E bit to 1 in

FLMCR1 (do not set SWE, PSU, EV, PV, E, and P bits at the same time).

Bit 5

ESU

Description

The erase setup state is cancelled

(initial value)

The flash memory changes to the erase setup state. Set this bit to 1 before setting

the E bit to 1 in FLMCR1.

Bit 4—Program Setup (PSU)

This bit is to prepare for changing to program mode. Set this bit to 1 before setting the P bit to 1

in FLMCR1 (do not set SWE, ESU, EV, PV, E, and P bits at the same time).

Bit 4

PSU

Description

The program setup state is cancelled

(initial value)

The flash memory changes to the program setup state. Set this bit to 1 before

setting the P bit to 1 in FLMCR1.

Bit 3—Erase-Verify (EV)

This bit is to set changing to or cancelling erase-verify mode (do not set SWE, ESU, PSU, PV, E,

and P bits at the same time).

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