H838024 datasheet(210/697 Pages) RENESAS

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Section 6 ROM

Rev. 7.00 Mar 10, 2005 page 168 of 652

REJ09B0042-0700

6.7.3

Notes on On-Board Programming

1. You must use the system clock oscillator when programming or erasing flash memory on the

H8/38124 Group. The on-chip oscillator should not be used for programming or erasing flash

memory. See section 4.2, On-Chip Oscillator Selection Method, for information on switching

between the system clock oscillator and the on-chip oscillator.

2. On the H8/38124 Group the watchdog timer operates after a reset is canceled. When executing

a program prepared by the user that performs programming and erasing in the user mode, the

watchdog timer’s overflow cycle should be set to an appropriate value. Refer to section 6.8.1,

Program/Program-Verify, for information on the appropriate watchdog timer overflow cycle

for programming, and refer to section 6.8.2, Erase/Erase-Verify, for information on the

appropriate watchdog timer overflow cycle for erasing.

6.8

Flash Memory Programming/Erasing

A software method using the CPU is employed to program and erase flash memory in the on-

board programming modes. Depending on the FLMCR1 setting, the flash memory operates in one

of the following four modes: Program mode, program-verify mode, erase mode, and erase-verify

mode. The programming control program in boot mode and the user program/erase control

program in user program mode use these operating modes in combination to perform

programming/erasing. Flash memory programming and erasing should be performed in

accordance with the descriptions in section 6.8.1, Program/Program-Verify and section 6.8.2,

Erase/Erase-Verify, respectively.

6.8.1

Program/Program-Verify

When writing data or programs to the flash memory, the program/program-verify flowchart shown

in figure 6.10 should be followed. Performing programming operations according to this

flowchart will enable data or programs to be written to the flash memory without subjecting the

chip to voltage stress or sacrificing program data reliability.

1. Programming must be done to an empty address. Do not reprogram an address to which

programming has already been performed.

2. Programming should be carried out 128 bytes at a time. A 128-byte data transfer must be

performed even if writing fewer than 128 bytes. In this case, H'FF data must be written to the

extra addresses.

3. Prepare the following data storage areas in RAM: A 128-byte programming data area, a 128-

byte reprogramming data area, and a 128-byte additional-programming data area. Perform

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