H838024 datasheet(208/697 Pages) RENESAS

208 / 697 page

Section 6 ROM

Rev. 7.00 Mar 10, 2005 page 166 of 652

REJ09B0042-0700

Table 6.8

Boot Mode Operation

Item

Host Operation

LSI Operation

Branches to boot program at reset-start.

Processing Contents

Bit rate

adjustment

Flash memory erase

Continuously transmits data H'00 at

specified bit rate.

· Measures low-level period of receive data H'00.

· Calculates bit rate and sets it in BRR of SCI3.

· Transmits data H'00 to the host to indicate that the

adjustment has ended.

Checks flash memory data, erases all flash memory

blocks in case of written data existing, and transmits

data H'AA to host. (If erase could not be done,

transmits data H'FF to host and aborts operation.)

Transmits data H'55 when data H'00

is received and no error occurs.

Transmits number of bytes (N) of

programming control program to be

transferred as 2-byte data (low-order

byte following high-order byte)

Transmits 1-byte of programming

control program

Transfer of

programming control

program

Execution of

Programming

control program

Transfer of

programming control

program (repeated for

N times)

Echobacks the 2-byte received data to host.

Transmits 1-byte data H'AA to host.

Branches to programming control program

transferred to on-chip RAM and starts execution.

Echobacks received data to host and also

transfers it to RAM.

Table 6.9

Oscillating Frequencies (fOSC) for which Automatic Adjustment of LSI Bit Rate

Is Possible

Product Group

Host Bit Rate

Oscillating Frequencie

s (fOSC) Range of LSI

4,800 bps

8 to 10 MHz

2,400 bps

4 to 10 MHz

F-ZTAT version of

H8/38024 Group and

F-ZTAT version of

H8/38024R Group

1,200 bps

2 to 10 MHz

19,200 bps

16 to 20 MHz

F-ZTAT version of

H8/38124 Group

9,600 bps

8 to 20 MHz

4,800 bps

6 to 20 MHz

2,400 bps

2 to 20 MHz

1,200 bps

2 to 20 MHz

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