H838024 datasheet(206/697 Pages) RENESAS

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Section 6 ROM

Rev. 7.00 Mar 10, 2005 page 164 of 652

REJ09B0042-0700

6.7

On-Board Programming Modes

There are two modes for programming/erasing of the flash memory; boot mode, which enables on-

board programming/erasing, and programmer mode, in which programming/erasing is performed

with a PROM programmer. On-board programming/erasing can also be performed in user

program mode. At reset-start in reset mode, the series of HD64F38024, HD64F38024R,

HD64F38124, and HD64F38122 changes to a mode depending on the TEST pin settings, P95 pin

settings, and input level of each port, as shown in table 6.7. The input level of each pin must be

defined four states before the reset ends.

When changing to boot mode, the boot program built into this LSI is initiated. The boot program

transfers the programming control program from the externally-connected host to on-chip RAM

via SCI3. After erasing the entire flash memory, the programming control program is executed.

This can be used for programming initial values in the on-board state or for a forcible return when

programming/erasing can no longer be done in user program mode. In user program mode,

individual blocks can be erased and programmed by branching to the user program/erase control

program prepared by the user.

Table 6.7

Setting Programming Modes

TEST

P95

P34

PB0

PB1

PB2

LSI State after Reset End

01X

User Mode

001X

Boot Mode

Programmer Mode

X: Don’t care

6.7.1

Boot Mode

Table 6.8 shows the boot mode operations between reset end and branching to the programming

control program.

1. When boot mode is used, the flash memory programming control program must be prepared in

the host beforehand. Prepare a programming control program in accordance with the

description in section 6.8, Flash Memory Programming/Erasing.

2. SCI3 should be set to asynchronous mode, and the transfer format as follows: 8-bit data, 1 stop

bit, and no parity. The inversion function of TXD and RXD pins by the SPCR register is set to

“Not to be inverted,” so do not put the circuit for inverting a value between the host and this

LSI.

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