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TDA4VM21 Datasheet(PDF) 249 Page - Texas Instruments |
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TDA4VM21 Datasheet(HTML) 249 Page - Texas Instruments |
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249 / 331 page  Section 6.9.5.13.1, Section 6.9.5.13.2, and Section 6.9.5.13.3 assume testing over the recommended operating conditions and electrical characteristic conditions (see Figure 6-78, Figure 6-79, and Figure 6-80). Table 6-59 represents HyperBus timing conditions. Table 6-59. HyperBus Timing Conditions PARAMETER DESCRIPTION MIN MAX UNIT INPUT CONDITIONS SRI Input slew rate 2 5 V/ns OUTPUT CONDITIONS CL Output load capacitance 1.5 10 pF PCB CONNECTIVITY REQUIREMENTS td(Trace Mismatch Delay) Propagation delay mismatch between traces CK and CKn; RWDS and DQ[7:0] 10 ps CK/CKn and RWDS; CK/CKn and CSn 200 ps CK/CKn and DQ[7:0] 35 ps RESETn and CSn[1:0] 340 ps 6.9.5.13.1 Timing Requirements for HyperBus NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT D1 tw(resetnL) Pulse duration, HYPERBUS0_RESETn low 200 ns D2 tw(csnL) Pulse duration, HYPERBUS0_CSn[1:0] low 1000 ns D3 td(resetnH-csnL) Delay time, HYPERBUS0_RESETn rising edge to HYPERBUS0_CSn[1:0] falling edge 200.34 ns D4 td(csnL-rwdsL) Delay time, HYPERBUS0_CSn[1:0] falling edge to HYPERBUS0_RWDS falling edge 166 MHz 186 ns 100 MHz 182 ns D5 tskn(rwdsV-dV) Input skew, HYPERBUS0_RWDS transition to HYPERBUS0_DQ[7:0] valid 166 MHz -0.46 0.46 ns LFD5 100 MHz -0.81 0.81 ns 6.9.5.13.2 HyperBus 166 MHz Switching Characteristics NO. PARAMETER DESCRIPTION MIN MAX UNIT D6 tc(ck/ckn) Cycle time, HYPERBUS0_CK/CKn 6 ns D7 tw(ck/ckn) Pulse duration, HYPERBUS0_CK/CKn high or low 2.85 ns D8 tw(csnH) Pulse duration, HYPERBUS0_CSn[1:0] invalid between operations 6 ns D9 td(csnL-ckH/cknL) Delay time, HYPERBUS0_CSn[1:0] falling edge to first HYPERBUS0_CK rising (HYPERBUS0_CKn falling) edge -3.28 ns D10 td(ckL/cknH-csnH) Delay time, last falling HYPERBUS0_CK (rising HYPERBUS0_Ckn) edge to HYPERBUS0_CSn[1:0] rising 0.28 ns D11 td(ckV/cknV-rwdsV) Delay time, HYPERBUS0_CK/CKn transition to HYPERBUS0_RWDS valid 0.68 2.14 ns D12 td(ckV-dV) Delay time, HYPERBUS0_CK/CKn transition to HYPERBUS0_DQ[7:0] valid 0.71 2.3 ns 6.9.5.13.3 HyperBus 100 MHz Switching Characteristics NO. PARAMETER DESCRIPTION MIN MAX UNIT LFD6 tc(ck/ckn) Cycle time, HYPERBUS0_CK/CKn 10 ns LFD7 tw(ck/ckn) Pulse duration, HYPERBUS0_CK/CKn high or low 4.88 ns LFD8 tw(csnH) Pulse duration, HYPERBUS0_CSn[1:0] invalid between operations 10 ns LFD9 td(csnL-ckH/cknL) Delay time, HYPERBUS0_CSn[1:0] falling edge to first HYPERBUS0_CK rising (HYPERBUS0_CKn falling) edge -3.33 ns www.ti.com TDA4VM-Q1, TDA4VM SPRSP36K – SEPTEMBER 2021 – REVISED APRIL 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 249 Product Folder Links: TDA4VM-Q1 TDA4VM |
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