TDA4VM21 datasheet(266/331 Pages) TI

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6.9.5.19.1.1 Legacy SDR Mode

Table 6-79, Figure 6-90, Table 6-80, and Figure 6-91 present timing requirements and switching characteristics

for MMC0 – Legacy SDR Mode.

Table 6-79. MMC0 Timing Requirements – Legacy SDR Mode

see Figure 6-90

NO.

MIN

MAX

UNIT

LSDR1

tsu(cmdV-clkH)

Setup time, MMC0_CMD valid before MMC0_CLK rising edge

9.69

LSDR2

th(clkH-cmdV)

Hold time, MMC0_CMD valid after MMC0_CLK rising edge

9.65

LSDR3

tsu(dV-clkH)

Setup time, MMC0_DAT[7:0] valid before MMC0_CLK rising edge

9.69

LSDR4

th(clkH-dV)

Hold time, MMC0_DAT[7:0] valid after MMC0_CLK rising edge

9.65

Figure 6-90. MMC0 – Legacy SDR – Receive Mode

Table 6-80. MMC0 Switching Characteristics – Legacy SDR Mode

see Figure 6-91

NO.

PARAMETER

MIN

MAX

UNIT

fop(clk)

Operating frequency, MMC0_CLK

MHz

LSDR5

tc(clk)

Cycle time, MMC0_CLK

LSDR6

tw(clkH)

Pulse duration, MMC0_CLK high

18.7

LSDR7

tw(clkL)

Pulse duration, MMC0_CLK low

18.7

LSDR8

td(clkL-cmdV)

Delay time, MMC0_CLK falling edge to MMC0_CMD transition

-2.74

5.07

LSDR9

td(clkL-dV)

Delay time, MMC0_CLK falling edge to MMC0_DAT[7:0] transition

-2.74

5.07

Figure 6-91. MMC0 – Legacy SDR – Transmit Mode

TDA4VM-Q1, TDA4VM

SPRSP36K – SEPTEMBER 2021 – REVISED APRIL 2024

www.ti.com

266

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