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PM7384 Datasheet(PDF) 40 Page - PMC-Sierra, Inc |
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PM7384 Datasheet(HTML) 40 Page - PMC-Sierra, Inc |
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40 / 358 page ![]() PM7384 FREEDM-84P672 DATA SHEET PMC-1990445 ISSUE 5 FRAME ENGINE AND DATA LINK MANAGER 84P672 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 29 Pin Name Type Pin No. Function TRDB Input C8 The test mode read enable signal (TRDB) is set low during FREEDM-84P672 register read accesses during production test (PMCTEST set high). The FREEDM-84P672 drives the test data bus (TDAT[15:0]) with the contents of the addressed register while TRDB is low. In normal operation (PMCTEST set low), this signal should be tied to logic 1. TWRB Input B8 The test mode write enable signal (TWRB) is set low during FREEDM-84P672 register write accesses during production test (PMCTEST set high). The contents of the test data bus (TDAT[15:0]) are clocked into the addressed register on the rising edge of TWRB. In normal operation (PMCTEST set low), this signal should be tied to logic 1. TDAT[0] TDAT[1] TDAT[2] TDAT[3] TDAT[4] TDAT[5] TDAT[6] TDAT[7] TDAT[8] TDAT[9] TDAT[10] TDAT[11] TDAT[12] TDAT[13] TDAT[14] TDAT[15] I/O AE11 AF11 AE12 AD13 AD14 AF15 AD15 AC15 AE17 AF18 AE18 AC17 AE19 AD19 AC19 AE21 The bi-directional test mode data bus (TDAT[15:0]) carries data read from or written to FREEDM-84P672 registers during production test (PMCTEST set high). In normal operation (PMCTEST set low), these signals should be left unconnected. |
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