PM7384 datasheet(7/358 Pages) PMC

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PM7384 FREEDM-84P672

DATA SHEET

PMC-1990445

ISSUE 5

FRAME ENGINE AND DATA LINK MANAGER 84P672

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

LIST OF FIGURES

FIGURE 1 – HDLC FRAME...............................................................................34

FIGURE 2 – CRC GENERATOR.......................................................................35

FIGURE 3 – PARTIAL PACKET BUFFER STRUCTURE ..................................40

FIGURE 4 – RECEIVE PACKET DESCRIPTOR...............................................42

FIGURE 5 – RECEIVE PACKET DESCRIPTOR TABLE...................................45

FIGURE 6 – RPDRF AND RPDRR QUEUES ...................................................48

FIGURE 7 – RPDRR QUEUE OPERATION......................................................50

FIGURE 8 – RECEIVE CHANNEL DESCRIPTOR REFERENCE TABLE.........51

FIGURE 9 – GPIC ADDRESS MAP ..................................................................58

FIGURE 10 – TRANSMIT DESCRIPTOR .........................................................60

FIGURE 11 – TRANSMIT DESCRIPTOR TABLE .............................................64

FIGURE 12 – TDRR AND TDRF QUEUES .......................................................66

FIGURE 13 – TRANSMIT CHANNEL DESCRIPTOR REFERENCE TABLE ....68

FIGURE 14 – TD LINKING................................................................................71

FIGURE 15 – PARTIAL PACKET BUFFER STRUCTURE ................................75

FIGURE 16 – INPUT OBSERVATION CELL (IN_CELL) ................................. 311

FIGURE 17 – OUTPUT CELL (OUT_CELL) ...................................................312

FIGURE 18 – BI-DIRECTIONAL CELL (IO_CELL) .........................................312

FIGURE 19 – LAYOUT OF OUTPUT ENABLE AND BI-DIRECTIONAL CELLS

..............................................................................................................313

FIGURE 20 – BOUNDARY SCAN ARCHITECTURE ......................................315

FIGURE 21 – TAP CONTROLLER FINITE STATE MACHINE........................317

FIGURE 22 – T1/E1 DROP BUS FUNCTIONAL TIMING................................321

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