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HTG2190 Datasheet(PDF) 24 Page - Holtek Semiconductor Inc |
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HTG2190 Datasheet(HTML) 24 Page - Holtek Semiconductor Inc |
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24 / 50 page ![]() HTG2190 Rev. 1.20 24 July 5, 2002 rives as VIH (input high voltage) of S1 gate, the NMOS will be turned on for discharge. The same manner can be used for measuring the related frequency of R2, but the roles of PB2 and PB3 should be exchanged. During execution of R to F function, the TMR1 should be set as event counter to count the charge/discharge waveform. Since the falling edge of the charge/dis- charge waveform is sharper than the rising edge, it is recommended that the active edge of the event counter on high to low be defined by setting TE (bit 3 of TMR1C). For other detailed operation about Timer/Event Counter 1, refer to a related section of the Timer/Event Counter 0/1. An example of a software program written for the pur- pose of measuring related frequency of R2 is shown be- low. SET PBC.3 ; set PB.3 to be input pin CLR PBC.2 ; set PB.2 to be output pin SET PB.2 ; output source current at PB.2 CLR X ¢TALC.3 ; disable TMR1 pull-high resistor Mov A, 48H ; set TMR1 to be event counter Mov TMR1C, A ; and active edge on high to low CLR TMR1L ; set TMR1L and TMR1H to be ²00² CLR TMR1H ; SET TMR1C.4 ; turn on TMR1 SET XT ¢ALC.1 ; turn on R to F function Timer 2/3 Timer 2 is an 8-bit counter, and its clock source come from the system clock divided by an 8-stage prescaler. There are two registers related to timer 2 ; TMR2 (21H) and TMR2C (22H). Two physical registers are mapped to TMR2 location; writing to TMR2 makes the starting value be placed in the Timer 2 preload register and reading the TMR2 obtains the contents of the timer 2 counter. The TMR2C is a control register, which defines the division ratio of the prescaler and counting enable or disable. Writing data to B2, B1 and B0 (bit 2, 1, 0 of TMR2C) can generate various clock source. Once the timer 2 starts counting, it will count from the current contents in the counter to FFH. Once an over- flow occurs, the counter is reloaded from the preload register, and generates an interrupt request flag (T2F; bit 4 of the INTCH). To enable the counting operation, the timer on bit (TON ; bit 4 of TMR2C) should be set to ²1². For proper operation, bit 6 of TMR2C should be set to ²1², and bit3, bit7 should be set to ²0². Timer 2 can also be used as a buzzer output by setting PB.0 and AUD to be PWM1 and PWM2 output respec- tively by mask option. When the PWM1/PWM2 is se- lected, setting 2FH.6/2FH.7 to ²1² will select PFD/PFDB output and setting 2FH.6/2FH.7 to ²0² will select PWM1/PWM2 output. When the PFD/PFDB function is selected, setting 2FH.4/2FH.5 to ²1² will enable PFD/PFDB output and setting 2FH.4/2FH.5 to ²0² will disable PFD/PFDB output. PFD Frequency= T2f/ [(256-TMR2) ´2]. TMR2C T2f B2 B1 B0 0 0 0 SYS CLK/2 0 0 1 SYS CLK/4 0 1 0 SYS CLK/8 0 1 1 SYS CLK/16 1 0 0 SYS CLK/32 1 0 1 SYS CLK/64 1 1 0 SYS CLK/128 1 1 1 SYS CLK/256 TMR2C Bit4 to enable/disable timer counting (0=dis- able;1=enable) TMR2C Bit3, always write ²0² TMR2C Bit5, always write ²0² TMR2C Bit6, always write ²1² TMR2C Bit7, always write ²0² V I H V I L Charge/discharge waveform |
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